# System value for internal compute shaders in radeonsi.
system_value("user_data_amd", 4)
+# In a fragment shader, the current sample mask. At the beginning of the shader,
+# this is the same as load_sample_mask_in, but as the shader is executed, it may
+# be affected by writes, discards, etc.
+#
+# No frontend generates this, but drivers may use it for internal lowerings.
+intrinsic("load_sample_mask", [], 1, [], flags=[CAN_ELIMINATE], sysval=True,
+ bit_sizes=[32])
+
# Barycentric coordinate intrinsics.
#
# These set up the barycentric coordinates for a particular interpolation.
# In a fragment shader, is the framebuffer single-sampled? 0/~0 bool
system_value("multisampled_pan", 1, bit_sizes=[32])
-# In a fragment shader, the current coverage mask. Affected by writes.
-intrinsic("load_coverage_mask_pan", [], 1, [], flags=[CAN_ELIMINATE],
- sysval=True, bit_sizes=[32])
-
# R600 specific instrincs
#
# location where the tesselation data is stored in LDS
bi_u16_to_u32_to(b, dst, bi_half(bi_preload(b, 61), false));
break;
- case nir_intrinsic_load_coverage_mask_pan:
+ case nir_intrinsic_load_sample_mask:
bi_mov_i32_to(b, dst, bi_coverage(b));
break;
b->cursor = nir_before_instr(&intr->instr);
- nir_ssa_def *orig = nir_load_coverage_mask_pan(b);
+ nir_ssa_def *orig = nir_load_sample_mask(b);
nir_instr_rewrite_src_ssa(
instr, &intr->src[0],