m68k/mm: use correct bit number in _PAGE_SWP_EXCLUSIVE comment
authorDavid Hildenbrand <david@redhat.com>
Tue, 4 Apr 2023 08:56:36 +0000 (10:56 +0200)
committerAndrew Morton <akpm@linux-foundation.org>
Tue, 18 Apr 2023 23:29:53 +0000 (16:29 -0700)
As noticed by Geert, commit b5c88f21531c ("microblaze/mm: support
__HAVE_ARCH_PTE_SWP_EXCLUSIVE") modified m68k code by accident.  While
replacing 0x080 by CF_PAGE_NOCACHE is correct, although it should have
been part of commit ed4154067a08 ("m68k/mm: support
__HAVE_ARCH_PTE_SWP_EXCLUSIVE"), replacing "bit 7" by "bit 24" in the
comment was wrong.

Let's revert to the previous, correct, comment.

Link: https://lkml.kernel.org/r/20230404085636.121409-1-david@redhat.com
Signed-off-by: David Hildenbrand <david@redhat.com>
Reported-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
arch/m68k/include/asm/mcf_pgtable.h

index 13741c1..d97fbb8 100644 (file)
@@ -46,7 +46,7 @@
 #define _CACHEMASK040          (~0x060)
 #define _PAGE_GLOBAL040                0x400   /* 68040 global bit, used for kva descs */
 
-/* We borrow bit 24 to store the exclusive marker in swap PTEs. */
+/* We borrow bit 7 to store the exclusive marker in swap PTEs. */
 #define _PAGE_SWP_EXCLUSIVE    CF_PAGE_NOCACHE
 
 /*