drm/amdgpu: handle CPU access for split VRAM buffers (v2)

This avoids merging them together on page fault.

v2: squash in 64-bit division fix

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 4dddeaf..758d8cf 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -927,8 +927,7 @@ int amdgpu_bo_fault_reserve_notify(struct ttm_buffer_object *bo)
        size = bo->mem.num_pages << PAGE_SHIFT;
        offset = bo->mem.start << PAGE_SHIFT;
        /* TODO: figure out how to map scattered VRAM to the CPU */
-       if ((offset + size) <= adev->mc.visible_vram_size &&
-           (abo->flags & AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS))
+       if ((offset + size) <= adev->mc.visible_vram_size)
                return 0;
 
        /* Can't move a pinned BO to visible VRAM */
@@ -936,7 +935,6 @@ int amdgpu_bo_fault_reserve_notify(struct ttm_buffer_object *bo)
                return -EINVAL;
 
        /* hurrah the memory is not visible ! */
-       abo->flags |= AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
        amdgpu_ttm_placement_from_domain(abo, AMDGPU_GEM_DOMAIN_VRAM);
        lpfn =  adev->mc.visible_vram_size >> PAGE_SHIFT;
        for (i = 0; i < abo->placement.num_placement; i++) {

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 83f4930..e3008d5 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -529,9 +529,6 @@ static int amdgpu_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_
        case TTM_PL_TT:
                break;
        case TTM_PL_VRAM:
-               if (mem->start == AMDGPU_BO_INVALID_OFFSET)
-                       return -EINVAL;
-
                mem->bus.offset = mem->start << PAGE_SHIFT;
                /* check if it's visible */
                if ((mem->bus.offset + mem->bus.size) > adev->mc.visible_vram_size)
@@ -549,6 +546,17 @@ static void amdgpu_ttm_io_mem_free(struct ttm_bo_device *bdev, struct ttm_mem_re
 {
 }
 
+static unsigned long amdgpu_ttm_io_mem_pfn(struct ttm_buffer_object *bo,
+                                          unsigned long page_offset)
+{
+       struct drm_mm_node *mm = bo->mem.mm_node;
+       uint64_t size = mm->size;
+       unsigned long offset = page_offset;
+
+       page_offset = do_div(offset, size);
+       return (bo->mem.bus.base >> PAGE_SHIFT) + mm->start + page_offset;
+}
+
 /*
  * TTM backend functions.
  */
@@ -1064,7 +1072,7 @@ static struct ttm_bo_driver amdgpu_bo_driver = {
        .fault_reserve_notify = &amdgpu_bo_fault_reserve_notify,
        .io_mem_reserve = &amdgpu_ttm_io_mem_reserve,
        .io_mem_free = &amdgpu_ttm_io_mem_free,
-       .io_mem_pfn = ttm_bo_default_io_mem_pfn,
+       .io_mem_pfn = amdgpu_ttm_io_mem_pfn,
 };
 
 int amdgpu_ttm_init(struct amdgpu_device *adev)