{
return GET_CODE (op) == SYMBOL_REF && FUNCTION_NAME_P (XSTR (op, 0));
}
+
+/* Return 1 if OP is suitable for the second add operand (the unshifed
+ operand) in an shadd instruction. Allow CONST_INT to work around
+ a reload bug. */
+int
+shadd_operand (op, mode)
+ rtx op;
+ enum machine_mode mode;
+{
+ if (GET_CODE (op) == REG)
+ return 1;
+ if (GET_CODE (op) == CONST_INT)
+ return 1;
+ return 0;
+}
[(set_attr "type" "load")
(set_attr "length" "1")])
-;; Using nonmemory_operand works around a bug in reload. For 2.4 fix
+;; Using shadd_operand works around a bug in reload. For 2.4 fix
;; reload and use register_operand instead.
(define_insn ""
[(set (match_operand:SI 0 "register_operand" "=r")
(plus:SI (mult:SI (match_operand:SI 2 "register_operand" "r")
(const_int 2))
- (match_operand:SI 1 "nonmemory_operand" "r")))]
+ (match_operand:SI 1 "shadd_operand" "r")))]
""
"sh1add %2,%1,%0")
[(set (match_operand:SI 0 "register_operand" "=r")
(plus:SI (mult:SI (match_operand:SI 2 "register_operand" "r")
(const_int 4))
- (match_operand:SI 1 "nonmemory_operand" "r")))]
+ (match_operand:SI 1 "shadd_operand" "r")))]
""
"sh2add %2,%1,%0")
[(set (match_operand:SI 0 "register_operand" "=r")
(plus:SI (mult:SI (match_operand:SI 2 "register_operand" "r")
(const_int 8))
- (match_operand:SI 1 "nonmemory_operand" "r")))]
+ (match_operand:SI 1 "shadd_operand" "r")))]
""
"sh3add %2,%1,%0")