[PORT FROM R2] pci_rtpm: remove the pm delay for intel_mid platforms

BZ: 2700

pci framework force a wait of 10ms for every pci devices
upon resume. This is not needed on mid_pmu platform and strongly impacts
performance

remove those default timers if we are on intel_mid platforms

Change-Id: I73ed8ea6560791fb5c44eb9bdaf9ddb6c315ffd5
Orig-Change-Id: If5824c5b7a1c8cd7698c979ab7d609aea60d2ea0
Signed-off-by: Pierre Tardy <pierre.tardy@intel.com>
Signed-off-by: Loic Martin <loicx.martin@intel.com>
Reviewed-on: http://android.intel.com:8080/32682
Reviewed-by: Mansoor, Illyas <illyas.mansoor@intel.com>
Reviewed-by: buildbot <buildbot@intel.com>
Tested-by: buildbot <buildbot@intel.com>

diff --git a/include/linux/pci.h b/include/linux/pci.h
index c446b5c..27a0eb4 100644 (file)
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -131,10 +131,17 @@ static inline const char *pci_power_name(pci_power_t state)
 {
        return pci_power_names[1 + (int) state];
 }
-
+#ifdef CONFIG_INTEL_MID_POWER
+/* On intel mid, the pci delay are already handled by SCU.
+   No need to wait more */
+#define PCI_PM_D2_DELAY        0
+#define PCI_PM_D3_WAIT 0
+#define PCI_PM_BUS_WAIT        0
+#else
 #define PCI_PM_D2_DELAY        200
 #define PCI_PM_D3_WAIT 10
 #define PCI_PM_BUS_WAIT        50
+#endif
 
 /** The pci_channel state describes connectivity between the CPU and
  *  the pci device.  If some PCI bus between here and the pci device