Merge tag 'xtensa-next-20140123' of git://github.com/czankel/xtensa-linux

Pull Xtensa patches from Chris Zankel:
 "The major changes are adding support for SMP for Xtensa, fixing and
  cleaning up the ISS (simulator) network driver, and better support for
  device trees"

* tag 'xtensa-next-20140123' of git://github.com/czankel/xtensa-linux: (40 commits)
  xtensa: implement ndelay
  xtensa: clean up udelay
  xtensa: enable HAVE_PERF_EVENTS
  xtensa: remap io area defined in device tree
  xtensa: support default device tree buses
  xtensa: initialize device tree clock sources
  xtensa: xtfpga: fix definitions of platform devices
  xtensa: standardize devicetree cpu compatible strings
  xtensa: avoid duplicate of IO range definitions
  xtensa: fix ATOMCTL register documentation
  xtensa: Enable irqs after cpu is set online
  xtensa: ISS: raise network polling rate to 10 times/sec
  xtensa: remove unused XTENSA_ISS_NETWORK Kconfig parameter
  xtensa: ISS: avoid simple_strtoul usage
  xtensa: Switch to sched_clock_register()
  xtensa: implement CPU hotplug
  xtensa: add SMP support
  xtensa: add MX irqchip
  xtensa: clear timer IRQ unconditionally in its handler
  xtensa: clean up do_interrupt/do_IRQ
  ...

diff --combined arch/xtensa/Kconfig
index f8df0cc,c3ccf37..ba56e11
--- 1/arch/xtensa/Kconfig
--- 2/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig
@@@ -9,7 -9,6 +9,6 @@@ config XTENS
        select GENERIC_CLOCKEVENTS
        select VIRT_TO_BUS
        select GENERIC_IRQ_SHOW
-       select GENERIC_CPU_DEVICES
        select GENERIC_SCHED_CLOCK
        select MODULES_USE_ELF_RELA
        select GENERIC_PCI_IOMAP
@@@ -19,6 -18,8 +18,8 @@@
        select IRQ_DOMAIN
        select HAVE_OPROFILE
        select HAVE_FUNCTION_TRACER
+       select HAVE_IRQ_TIME_ACCOUNTING
+       select HAVE_PERF_EVENTS
        help
          Xtensa processors are 32-bit RISC machines designed by Tensilica
          primarily for embedded systems.  These processors are both
@@@ -64,9 -65,9 +65,12 @@@ config MM
  config VARIANT_IRQ_SWITCH
        def_bool n
  
 +config HAVE_XTENSA_GPIO32
 +      def_bool n
 +
+ config MAY_HAVE_SMP
+       def_bool n
+ 
  menu "Processor type and features"
  
  choice
@@@ -76,19 -77,16 +80,19 @@@
  config XTENSA_VARIANT_FSF
        bool "fsf - default (not generic) configuration"
        select MMU
 +      select HAVE_XTENSA_GPIO32
  
  config XTENSA_VARIANT_DC232B
        bool "dc232b - Diamond 232L Standard Core Rev.B (LE)"
        select MMU
 +      select HAVE_XTENSA_GPIO32
        help
          This variant refers to Tensilica's Diamond 232L Standard core Rev.B (LE).
  
  config XTENSA_VARIANT_DC233C
        bool "dc233c - Diamond 233L Standard Core Rev.C (LE)"
        select MMU
 +      select HAVE_XTENSA_GPIO32
        help
          This variant refers to Tensilica's Diamond 233L Standard core Rev.C (LE).
  
@@@ -110,6 -108,48 +114,48 @@@ config XTENSA_UNALIGNED_USE
  
  source "kernel/Kconfig.preempt"
  
+ config HAVE_SMP
+       bool "System Supports SMP (MX)"
+       depends on MAY_HAVE_SMP
+       select XTENSA_MX
+       help
+         This option is use to indicate that the system-on-a-chip (SOC)
+         supports Multiprocessing. Multiprocessor support implemented above
+         the CPU core definition and currently needs to be selected manually.
+ 
+         Multiprocessor support in implemented with external cache and
+         interrupt controlers.
+ 
+         The MX interrupt distributer adds Interprocessor Interrupts
+         and causes the IRQ numbers to be increased by 4 for devices
+         like the open cores ethernet driver and the serial interface.
+ 
+         You still have to select "Enable SMP" to enable SMP on this SOC.
+ 
+ config SMP
+       bool "Enable Symmetric multi-processing support"
+       depends on HAVE_SMP
+       select USE_GENERIC_SMP_HELPERS
+       select GENERIC_SMP_IDLE_THREAD
+       help
+         Enabled SMP Software; allows more than one CPU/CORE
+         to be activated during startup.
+ 
+ config NR_CPUS
+       depends on SMP
+       int "Maximum number of CPUs (2-32)"
+       range 2 32
+       default "4"
+ 
+ config HOTPLUG_CPU
+       bool "Enable CPU hotplug support"
+       depends on SMP
+       help
+         Say Y here to allow turning CPUs off and on. CPUs can be
+         controlled through /sys/devices/system/cpu.
+ 
+         Say N if you want to disable CPU hotplug.
+ 
  config MATH_EMULATION
        bool "Math emulation"
        help
@@@ -156,9 -196,6 +202,6 @@@ config XTENSA_CALIBRATE_CCOUN
  config SERIAL_CONSOLE
        def_bool n
  
- config XTENSA_ISS_NETWORK
-       def_bool n
- 
  menu "Bus options"
  
  config PCI
@@@ -185,7 -222,6 +228,6 @@@ config XTENSA_PLATFORM_IS
        depends on TTY
        select XTENSA_CALIBRATE_CCOUNT
        select SERIAL_CONSOLE
-       select XTENSA_ISS_NETWORK
        help
          ISS is an acronym for Tensilica's Instruction Set Simulator.
  

diff --combined arch/xtensa/include/asm/barrier.h
index e1ee6b5,8e5e5c9..0a24b04
--- 1/arch/xtensa/include/asm/barrier.h
--- 2/arch/xtensa/include/asm/barrier.h
+++ b/arch/xtensa/include/asm/barrier.h
@@@ -9,14 -9,23 +9,10 @@@
  #ifndef _XTENSA_SYSTEM_H
  #define _XTENSA_SYSTEM_H
  
 -#define smp_read_barrier_depends() do { } while(0)
 -#define read_barrier_depends() do { } while(0)
 -
  #define mb()  ({ __asm__ __volatile__("memw" : : : "memory"); })
  #define rmb() barrier()
  #define wmb() mb()
  
--#ifdef CONFIG_SMP
- #error smp_* not defined
 -#define smp_mb()      mb()
 -#define smp_rmb()     rmb()
 -#define smp_wmb()     wmb()
 -#else
 -#define smp_mb()      barrier()
 -#define smp_rmb()     barrier()
 -#define smp_wmb()     barrier()
--#endif
--
 -#define set_mb(var, value)    do { var = value; mb(); } while (0)
 +#include <asm-generic/barrier.h>
  
  #endif /* _XTENSA_SYSTEM_H */

diff --combined drivers/irqchip/Kconfig
index 940638d,07bc79c..61ffdca
--- 1/drivers/irqchip/Kconfig
--- 2/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@@ -30,10 -30,6 +30,10 @@@ config ARM_VIC_N
          The maximum number of VICs available in the system, for
          power management.
  
 +config DW_APB_ICTL
 +      bool
 +      select IRQ_DOMAIN
 +
  config IMGPDC_IRQ
        bool
        select GENERIC_IRQ_CHIP
@@@ -65,3 -61,7 +65,7 @@@ config VERSATILE_FPGA_IRQ_N
         int
         default 4
         depends on VERSATILE_FPGA_IRQ
+ 
+ config XTENSA_MX
+       bool
+       select IRQ_DOMAIN

diff --combined drivers/irqchip/Makefile
index 6427323,66913f9..86b484c
--- 1/drivers/irqchip/Makefile
--- 2/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@@ -6,7 -6,6 +6,7 @@@ obj-$(CONFIG_ARCH_MMP)                   += irq-mmp.
  obj-$(CONFIG_ARCH_MVEBU)              += irq-armada-370-xp.o
  obj-$(CONFIG_ARCH_MXS)                        += irq-mxs.o
  obj-$(CONFIG_ARCH_S3C24XX)            += irq-s3c24xx.o
 +obj-$(CONFIG_DW_APB_ICTL)             += irq-dw-apb-ictl.o
  obj-$(CONFIG_METAG)                   += irq-metag-ext.o
  obj-$(CONFIG_METAG_PERFCOUNTER_IRQS)  += irq-metag.o
  obj-$(CONFIG_ARCH_MOXART)             += irq-moxart.o
@@@ -23,3 -22,5 +23,5 @@@ obj-$(CONFIG_RENESAS_IRQC)            += irq-rene
  obj-$(CONFIG_VERSATILE_FPGA_IRQ)      += irq-versatile-fpga.o
  obj-$(CONFIG_ARCH_VT8500)             += irq-vt8500.o
  obj-$(CONFIG_TB10X_IRQC)              += irq-tb10x.o
+ obj-$(CONFIG_XTENSA)                  += irq-xtensa-pic.o
+ obj-$(CONFIG_XTENSA_MX)                       += irq-xtensa-mx.o