drm/i915: Rename ->emit_request to ->emit_breadcrumb

Now that the emission of the request tail and its submission to hardware
are two separate steps, engine->emit_request() is confusing.
engine->emit_request() is called to emit the breadcrumb commands for the
request into the ring, name it such (engine->emit_breadcrumb).

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20161028125858.23563-27-chris@chris-wilson.co.uk

diff --git a/drivers/gpu/drm/i915/i915_gem_request.c b/drivers/gpu/drm/i915/i915_gem_request.c
index 311cf3f..a626b26 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gem_request.c
+++ b/drivers/gpu/drm/i915/i915_gem_request.c
@@ -685,8 +685,8 @@ void __i915_add_request(struct drm_i915_gem_request *request, bool flush_caches)
        request->postfix = ring->tail;
 
        /* Not allowed to fail! */
-       ret = engine->emit_request(request);
-       WARN(ret, "(%s)->emit_request failed: %d!\n", engine->name, ret);
+       ret = engine->emit_breadcrumb(request);
+       WARN(ret, "(%s)->emit_breadcrumb failed: %d!\n", engine->name, ret);
 
        /* Sanity check that the reserved size was large enough. */
        ret = ring->tail - request_start;

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index e0a9bf8..57dba45 100644 (file)
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -440,7 +440,7 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
        if (last)
                /* WaIdleLiteRestore:bdw,skl
                 * Apply the wa NOOPs to prevent ring:HEAD == req:TAIL
-                * as we resubmit the request. See gen8_emit_request()
+                * as we resubmit the request. See gen8_emit_breadcrumb()
                 * for where we prepare the padding after the end of the
                 * request.
                 */
@@ -1567,7 +1567,7 @@ static void bxt_a_seqno_barrier(struct intel_engine_cs *engine)
  * restore with HEAD==TAIL (WaIdleLiteRestore).
  */
 
-static int gen8_emit_request(struct drm_i915_gem_request *request)
+static int gen8_emit_breadcrumb(struct drm_i915_gem_request *request)
 {
        struct intel_ring *ring = request->ring;
        int ret;
@@ -1590,7 +1590,7 @@ static int gen8_emit_request(struct drm_i915_gem_request *request)
        return intel_logical_ring_advance(request);
 }
 
-static int gen8_emit_request_render(struct drm_i915_gem_request *request)
+static int gen8_emit_breadcrumb_render(struct drm_i915_gem_request *request)
 {
        struct intel_ring *ring = request->ring;
        int ret;
@@ -1694,7 +1694,7 @@ logical_ring_default_vfuncs(struct intel_engine_cs *engine)
        engine->init_hw = gen8_init_common_ring;
        engine->reset_hw = reset_common_ring;
        engine->emit_flush = gen8_emit_flush;
-       engine->emit_request = gen8_emit_request;
+       engine->emit_breadcrumb = gen8_emit_breadcrumb;
        engine->submit_request = execlists_submit_request;
 
        engine->irq_enable = gen8_logical_ring_enable_irq;
@@ -1816,7 +1816,7 @@ int logical_render_ring_init(struct intel_engine_cs *engine)
                engine->init_hw = gen8_init_render_ring;
        engine->init_context = gen8_init_rcs_context;
        engine->emit_flush = gen8_emit_flush_render;
-       engine->emit_request = gen8_emit_request_render;
+       engine->emit_breadcrumb = gen8_emit_breadcrumb_render;
 
        ret = intel_engine_create_scratch(engine, 4096);
        if (ret)

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 76c6b70..54c3981 100644 (file)
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1328,7 +1328,7 @@ static void i9xx_submit_request(struct drm_i915_gem_request *request)
                        intel_ring_offset(request->ring, request->tail));
 }
 
-static int i9xx_emit_request(struct drm_i915_gem_request *req)
+static int i9xx_emit_breadcrumb(struct drm_i915_gem_request *req)
 {
        struct intel_ring *ring = req->ring;
        int ret;
@@ -1349,14 +1349,14 @@ static int i9xx_emit_request(struct drm_i915_gem_request *req)
 }
 
 /**
- * gen6_sema_emit_request - Update the semaphore mailbox registers
+ * gen6_sema_emit_breadcrumb - Update the semaphore mailbox registers
  *
  * @request - request to write to the ring
  *
  * Update the mailbox registers in the *other* rings with the current seqno.
  * This acts like a signal in the canonical semaphore.
  */
-static int gen6_sema_emit_request(struct drm_i915_gem_request *req)
+static int gen6_sema_emit_breadcrumb(struct drm_i915_gem_request *req)
 {
        int ret;
 
@@ -1364,10 +1364,10 @@ static int gen6_sema_emit_request(struct drm_i915_gem_request *req)
        if (ret)
                return ret;
 
-       return i9xx_emit_request(req);
+       return i9xx_emit_breadcrumb(req);
 }
 
-static int gen8_render_emit_request(struct drm_i915_gem_request *req)
+static int gen8_render_emit_breadcrumb(struct drm_i915_gem_request *req)
 {
        struct intel_engine_cs *engine = req->engine;
        struct intel_ring *ring = req->ring;
@@ -2637,9 +2637,9 @@ static void intel_ring_default_vfuncs(struct drm_i915_private *dev_priv,
        engine->init_hw = init_ring_common;
        engine->reset_hw = reset_ring_common;
 
-       engine->emit_request = i9xx_emit_request;
+       engine->emit_breadcrumb = i9xx_emit_breadcrumb;
        if (i915.semaphores)
-               engine->emit_request = gen6_sema_emit_request;
+               engine->emit_breadcrumb = gen6_sema_emit_breadcrumb;
        engine->submit_request = i9xx_submit_request;
 
        if (INTEL_GEN(dev_priv) >= 8)
@@ -2666,7 +2666,7 @@ int intel_init_render_ring_buffer(struct intel_engine_cs *engine)
 
        if (INTEL_GEN(dev_priv) >= 8) {
                engine->init_context = intel_rcs_ctx_init;
-               engine->emit_request = gen8_render_emit_request;
+               engine->emit_breadcrumb = gen8_render_emit_breadcrumb;
                engine->emit_flush = gen8_render_ring_flush;
                if (i915.semaphores)
                        engine->semaphore.signal = gen8_rcs_signal;

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index a62e396..a5ced16 100644 (file)
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -255,7 +255,7 @@ struct intel_engine_cs {
 #define I915_DISPATCH_SECURE BIT(0)
 #define I915_DISPATCH_PINNED BIT(1)
 #define I915_DISPATCH_RS     BIT(2)
-       int             (*emit_request)(struct drm_i915_gem_request *req);
+       int             (*emit_breadcrumb)(struct drm_i915_gem_request *req);
 
        /* Pass the request to the hardware queue (e.g. directly into
         * the legacy ringbuffer or to the end of an execlist).