octeontx2-af: Limit link bringup time at firmware

Set the maximum time firmware should poll for a link.
If not set firmware could block CPU for a long time resulting
in mailbox failures. If link doesn't come up within 1second,
firmware will anyway notify the status as and when LINK comes up

Signed-off-by: Hariprasad Kelam <hkelam@marvell.com>
Signed-off-by: Sunil Kovvuri Goutham <sgoutham@marvell.com>
Signed-off-by: Geetha Sowjanya <gakula@marvell.com>
Link: https://lore.kernel.org/r/20220712161815.12621-1-gakula@marvell.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
index 894425768a31f4585cbaf0e99aac60f3172a4c29..85eb4a6f4fcf977dbec0fc9389c054ef12ff5c71 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
@@ -1440,11 +1440,19 @@ static int cgx_fwi_link_change(struct cgx *cgx, int lmac_id, bool enable)
        u64 req = 0;
        u64 resp;
 
-       if (enable)
+       if (enable) {
                req = FIELD_SET(CMDREG_ID, CGX_CMD_LINK_BRING_UP, req);
-       else
-               req = FIELD_SET(CMDREG_ID, CGX_CMD_LINK_BRING_DOWN, req);
+               /* On CN10K firmware offloads link bring up/down operations to ECP
+                * On Octeontx2 link operations are handled by firmware itself
+                * which can cause mbox errors so configure maximum time firmware
+                * poll for Link as 1000 ms
+                */
+               if (!is_dev_rpm(cgx))
+                       req = FIELD_SET(LINKCFG_TIMEOUT, 1000, req);
 
+       } else {
+               req = FIELD_SET(CMDREG_ID, CGX_CMD_LINK_BRING_DOWN, req);
+       }
        return cgx_fwi_cmd_generic(req, &resp, cgx, lmac_id);
 }
 

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.h b/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
index bd2f33a26eeef026906b06a9b8528a39601c2b69..0b06788b8d80a8a1801c79b39def303f7a07021b 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
@@ -92,7 +92,7 @@
 
 #define CGX_COMMAND_REG                        CGXX_SCRATCH1_REG
 #define CGX_EVENT_REG                  CGXX_SCRATCH0_REG
-#define CGX_CMD_TIMEOUT                        2200 /* msecs */
+#define CGX_CMD_TIMEOUT                        5000 /* msecs */
 #define DEFAULT_PAUSE_TIME             0x7FF
 
 #define CGX_LMAC_FWI                   0

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h b/drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h
index f72ec0e2506f460afb2db24c8141df441949e5c0..d4a27c882a5b90da35599015cc5eb8ffa184c860 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h
@@ -261,4 +261,6 @@ struct cgx_lnk_sts {
 #define CMDMODECHANGE_PORT             GENMASK_ULL(21, 14)
 #define CMDMODECHANGE_FLAGS            GENMASK_ULL(63, 22)
 
+/* LINK_BRING_UP command timeout */
+#define LINKCFG_TIMEOUT                GENMASK_ULL(21, 8)
 #endif /* __CGX_FW_INTF_H__ */

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
index 51c2cadd133337141da53376011b04ba036a235c..d7762577e285820720facb011afb05da3d21cf17 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
@@ -33,7 +33,7 @@
 
 #define INTR_MASK(pfvfs) ((pfvfs < 64) ? (BIT_ULL(pfvfs) - 1) : (~0ull))
 
-#define MBOX_RSP_TIMEOUT       3000 /* Time(ms) to wait for mbox response */
+#define MBOX_RSP_TIMEOUT       6000 /* Time(ms) to wait for mbox response */
 
 #define MBOX_MSG_ALIGN         16  /* Align mbox msg start to 16bytes */