* config/arm/arm.c (arm_expand_prologue): Do tell the dwarf2 backend

        about the SP adjustment for saving the static chain pointer.
        * dwarf2out.c (dwarf2out_frame_debug_expr): Use the specified
        offset when setting a temporary CFA register.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@39554 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 34d126d..d2562aa 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2001-02-08  Jason Merrill  <jason@redhat.com>
+
+       * config/arm/arm.c (arm_expand_prologue): Do tell the dwarf2 backend
+       about the SP adjustment for saving the static chain pointer.
+       * dwarf2out.c (dwarf2out_frame_debug_expr): Use the specified
+       offset when setting a temporary CFA register.
+
 2001-02-08  Chandrakala Chavva  <cchavva@redhat.com>
 
        * config.gcc : New targets, i386-*-chorusos*, sparc-*-chorusos*,

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 53dd0dd..d906b14 100644 (file)
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -7804,27 +7804,34 @@ arm_expand_prologue ()
                  
             If neither of these places is available, we abort (for now).
 
-            Note - setting RTX_FRAME_RELATED_P on these insns breaks
-            the dwarf2 parsing code in various bits of gcc.  This ought
-            to be fixed sometime, but until then the flag is suppressed.
-            [Use gcc/testsuite/gcc.c-torture/execute/921215-1.c with
-            "-O3 -g" to test this].  */
+            Note - we only need to tell the dwarf2 backend about the SP
+            adjustment in the second variant; the static chain register
+            doesn't need to be unwound, as it doesn't contain a value
+            inherited from the caller.  */
 
          if (regs_ever_live[3] == 0)
            {
              insn = gen_rtx_REG (SImode, 3);
              insn = gen_rtx_SET (SImode, insn, ip_rtx);
              insn = emit_insn (insn);
-             /* RTX_FRAME_RELATED_P (insn) = 1; */
            }
          else if (current_function_pretend_args_size == 0)
            {
+             rtx dwarf;
              insn = gen_rtx_PRE_DEC (SImode, stack_pointer_rtx);
              insn = gen_rtx_MEM (SImode, insn);
              insn = gen_rtx_SET (VOIDmode, insn, ip_rtx);
              insn = emit_insn (insn);
-             /* RTX_FRAME_RELATED_P (insn) = 1; */
+
              fp_offset = 4;
+
+             /* Just tell the dwarf backend that we adjusted SP.  */
+             dwarf = gen_rtx_SET (VOIDmode, stack_pointer_rtx,
+                                  gen_rtx_PLUS (SImode, stack_pointer_rtx,
+                                                GEN_INT (-fp_offset)));
+             RTX_FRAME_RELATED_P (insn) = 1;
+             REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
+                                                   dwarf, REG_NOTES (insn));
            }
          else
            /* FIXME - the way to handle this situation is to allow
@@ -7931,7 +7938,6 @@ arm_expand_prologue ()
              insn = gen_rtx_REG (SImode, 3);
              insn = gen_rtx_SET (SImode, ip_rtx, insn);
              insn = emit_insn (insn);
-             /* RTX_FRAME_RELATED_P (insn) = 1; */
            }
          else /* if (current_function_pretend_args_size == 0) */
            {
@@ -7939,7 +7945,6 @@ arm_expand_prologue ()
              insn = gen_rtx_MEM (SImode, insn);
              insn = gen_rtx_SET (SImode, ip_rtx, insn);
              insn = emit_insn (insn);
-             /* RTX_FRAME_RELATED_P (insn) = 1; */
            }
        }
     }

diff --git a/gcc/dwarf2out.c b/gcc/dwarf2out.c
index d8b3370..fa62101 100644 (file)
--- a/gcc/dwarf2out.c
+++ b/gcc/dwarf2out.c
@@ -1321,8 +1321,6 @@ dw_cfa_location cfa_temp;
   Rules  1- 4: Setting a register's value to cfa.reg or an expression
               with cfa.reg as the first operand changes the cfa.reg and its
               cfa.offset.
-              (For an unknown reason, Rule 4 does not fully obey the
-              invariant.)
 
   Rules  6- 9: Set a non-cfa.reg register value to a constant or an
               expression yielding a constant.  This sets cfa_temp.reg
@@ -1362,8 +1360,6 @@ dw_cfa_location cfa_temp;
   constraints: <reg1> != fp
               <reg1> != sp
   effects: cfa.reg = <reg1>
-  questions: Where is <const_int> used?
-            Should cfa.offset be changed?
 
   Rule 5:
   (set <reg1> (plus <reg2>:cfa_temp.reg sp:cfa.reg))
@@ -1547,9 +1543,15 @@ dwarf2out_frame_debug_expr (expr, label)
              if (GET_CODE (XEXP (src, 0)) == REG
                  && REGNO (XEXP (src, 0)) == cfa.reg
                  && GET_CODE (XEXP (src, 1)) == CONST_INT)
-               /* Setting a temporary CFA register that will be copied
-                  into the FP later on.  */
-               cfa.reg = REGNO (dest);
+               {
+                 /* Setting a temporary CFA register that will be copied
+                    into the FP later on.  */
+                 offset = INTVAL (XEXP (src, 1));
+                 if (GET_CODE (src) == PLUS)
+                   offset = -offset;
+                 cfa.offset += offset;
+                 cfa.reg = REGNO (dest);
+               }
              /* Rule 5 */
              else
                {