rockchip: rk3288: grf: Add grf define for mipi dsi

Add grf register define for rk3288 mipi dsi

Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3288.h b/arch/arm/include/asm/arch-rockchip/grf_rk3288.h
index 1a7c819..7d56b8c 100644 (file)
--- a/arch/arm/include/asm/arch-rockchip/grf_rk3288.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3288.h
@@ -824,4 +824,66 @@ enum {
                (0x7f << RK3288_CLK_TX_DL_CFG_GMAC_SHIFT),
 };
 
+/* GRF_SOC_CON6 */
+enum GRF_SOC_CON6 {
+       RK3288_HDMI_EDP_SEL_SHIFT = 0xf,
+       RK3288_HDMI_EDP_SEL_MASK =
+               1 << RK3288_HDMI_EDP_SEL_SHIFT,
+       RK3288_HDMI_EDP_SEL_EDP = 0,
+       RK3288_HDMI_EDP_SEL_HDMI,
+
+       RK3288_DSI0_DPICOLORM_SHIFT = 0x8,
+       RK3288_DSI0_DPICOLORM_MASK =
+               1 << RK3288_DSI0_DPICOLORM_SHIFT,
+
+       RK3288_DSI0_DPISHUTDN_SHIFT = 0x7,
+       RK3288_DSI0_DPISHUTDN_MASK =
+               1 << RK3288_DSI0_DPISHUTDN_SHIFT,
+
+       RK3288_DSI0_LCDC_SEL_SHIFT = 0x6,
+       RK3288_DSI0_LCDC_SEL_MASK =
+               1 << RK3288_DSI0_LCDC_SEL_SHIFT,
+       RK3288_DSI0_LCDC_SEL_BIG = 0,
+       RK3288_DSI0_LCDC_SEL_LIT = 1,
+
+       RK3288_EDP_LCDC_SEL_SHIFT = 0x5,
+       RK3288_EDP_LCDC_SEL_MASK =
+               1 << RK3288_EDP_LCDC_SEL_SHIFT,
+       RK3288_EDP_LCDC_SEL_BIG = 0,
+       RK3288_EDP_LCDC_SEL_LIT = 1,
+
+       RK3288_HDMI_LCDC_SEL_SHIFT = 0x4,
+       RK3288_HDMI_LCDC_SEL_MASK =
+               1 << RK3288_HDMI_LCDC_SEL_SHIFT,
+       RK3288_HDMI_LCDC_SEL_BIG = 0,
+       RK3288_HDMI_LCDC_SEL_LIT = 1,
+
+       RK3288_LVDS_LCDC_SEL_SHIFT = 0x3,
+       RK3288_LVDS_LCDC_SEL_MASK =
+               1 << RK3288_LVDS_LCDC_SEL_SHIFT,
+       RK3288_LVDS_LCDC_SEL_BIG = 0,
+       RK3288_LVDS_LCDC_SEL_LIT = 1,
+};
+
+/* RK3288_SOC_CON8 */
+enum GRF_SOC_CON8 {
+       RK3288_DPHY_TX0_RXMODE_SHIFT = 4,
+       RK3288_DPHY_TX0_RXMODE_MASK =
+          0xf << RK3288_DPHY_TX0_RXMODE_SHIFT,
+       RK3288_DPHY_TX0_RXMODE_EN = 0xf,
+       RK3288_DPHY_TX0_RXMODE_DIS = 0,
+
+       RK3288_DPHY_TX0_TXSTOPMODE_SHIFT = 0x8,
+       RK3288_DPHY_TX0_TXSTOPMODE_MASK =
+          0xf << RK3288_DPHY_TX0_TXSTOPMODE_SHIFT,
+       RK3288_DPHY_TX0_TXSTOPMODE_EN = 0xf,
+       RK3288_DPHY_TX0_TXSTOPMODE_DIS = 0,
+
+       RK3288_DPHY_TX0_TURNREQUEST_SHIFT = 0,
+       RK3288_DPHY_TX0_TURNREQUEST_MASK =
+          0xf << RK3288_DPHY_TX0_TURNREQUEST_SHIFT,
+       RK3288_DPHY_TX0_TURNREQUEST_EN = 0xf,
+       RK3288_DPHY_TX0_TURNREQUEST_DIS = 0,
+};
+
 #endif