return true;
}
+struct radv_shader *
+radv_shader_create_cached(struct radv_device *device, struct vk_pipeline_cache *cache,
+ const struct radv_shader_binary *binary)
+{
+ if (radv_is_cache_disabled(device))
+ return radv_shader_create(device, binary);
+
+ uint8_t hash[SHA1_DIGEST_LENGTH];
+ _mesa_sha1_compute(binary, binary->total_size, hash);
+
+ /* TODO: Skip disk-cache for meta-shaders because they are stored in a different cache file */
+
+ struct vk_pipeline_cache_object *shader_obj;
+ shader_obj = vk_pipeline_cache_create_and_insert_object(cache, hash, SHA1_DIGEST_LENGTH, binary,
+ binary->total_size, &radv_shader_ops);
+
+ return shader_obj ? container_of(shader_obj, struct radv_shader, base) : NULL;
+}
+
const struct vk_pipeline_cache_object_ops radv_shader_ops = {
.serialize = radv_shader_serialize,
.deserialize = radv_shader_deserialize,
struct radv_shader *radv_shader_create(struct radv_device *device,
const struct radv_shader_binary *binary);
+
+struct radv_shader *radv_shader_create_cached(struct radv_device *device,
+ struct vk_pipeline_cache *cache,
+ const struct radv_shader_binary *binary);
+
struct radv_shader *radv_shader_nir_to_asm(
struct radv_device *device, struct radv_pipeline_stage *stage, struct nir_shader *const *shaders,
int shader_count, const struct radv_pipeline_key *key, bool keep_shader_info, bool keep_statistic_info,