mmc: mmci: add variant property to define dpsm bit
authorLudovic Barre <ludovic.barre@st.com>
Mon, 8 Oct 2018 12:08:46 +0000 (14:08 +0200)
committerUlf Hansson <ulf.hansson@linaro.org>
Tue, 9 Oct 2018 07:13:04 +0000 (09:13 +0200)
This patch adds datactrl variant property to define
dpsm enable bit. Needed to support the STM32 variant
(STM32 has no dpsm enable bit).

Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
drivers/mmc/host/mmci.c
drivers/mmc/host/mmci.h

index 9f0cef0..0443b3a 100644 (file)
@@ -62,6 +62,7 @@ static struct variant_data variant_arm = {
        .cmdreg_srsp            = MCI_CPSM_RESPONSE,
        .datalength_bits        = 16,
        .datactrl_blocksz       = 11,
+       .datactrl_dpsm_enable   = MCI_DPSM_ENABLE,
        .pwrreg_powerup         = MCI_PWR_UP,
        .f_max                  = 100000000,
        .reversed_irq_handling  = true,
@@ -80,6 +81,7 @@ static struct variant_data variant_arm_extended_fifo = {
        .cmdreg_srsp            = MCI_CPSM_RESPONSE,
        .datalength_bits        = 16,
        .datactrl_blocksz       = 11,
+       .datactrl_dpsm_enable   = MCI_DPSM_ENABLE,
        .pwrreg_powerup         = MCI_PWR_UP,
        .f_max                  = 100000000,
        .mmcimask1              = true,
@@ -98,6 +100,7 @@ static struct variant_data variant_arm_extended_fifo_hwfc = {
        .cmdreg_srsp            = MCI_CPSM_RESPONSE,
        .datalength_bits        = 16,
        .datactrl_blocksz       = 11,
+       .datactrl_dpsm_enable   = MCI_DPSM_ENABLE,
        .pwrreg_powerup         = MCI_PWR_UP,
        .f_max                  = 100000000,
        .mmcimask1              = true,
@@ -117,6 +120,7 @@ static struct variant_data variant_u300 = {
        .cmdreg_srsp            = MCI_CPSM_RESPONSE,
        .datalength_bits        = 16,
        .datactrl_blocksz       = 11,
+       .datactrl_dpsm_enable   = MCI_DPSM_ENABLE,
        .datactrl_mask_sdio     = MCI_DPSM_ST_SDIOEN,
        .st_sdio                        = true,
        .pwrreg_powerup         = MCI_PWR_ON,
@@ -141,6 +145,7 @@ static struct variant_data variant_nomadik = {
        .cmdreg_srsp            = MCI_CPSM_RESPONSE,
        .datalength_bits        = 24,
        .datactrl_blocksz       = 11,
+       .datactrl_dpsm_enable   = MCI_DPSM_ENABLE,
        .datactrl_mask_sdio     = MCI_DPSM_ST_SDIOEN,
        .st_sdio                = true,
        .st_clkdiv              = true,
@@ -168,6 +173,7 @@ static struct variant_data variant_ux500 = {
        .cmdreg_srsp            = MCI_CPSM_RESPONSE,
        .datalength_bits        = 24,
        .datactrl_blocksz       = 11,
+       .datactrl_dpsm_enable   = MCI_DPSM_ENABLE,
        .datactrl_mask_sdio     = MCI_DPSM_ST_SDIOEN,
        .st_sdio                = true,
        .st_clkdiv              = true,
@@ -200,6 +206,7 @@ static struct variant_data variant_ux500v2 = {
        .datactrl_mask_ddrmode  = MCI_DPSM_ST_DDRMODE,
        .datalength_bits        = 24,
        .datactrl_blocksz       = 11,
+       .datactrl_dpsm_enable   = MCI_DPSM_ENABLE,
        .datactrl_mask_sdio     = MCI_DPSM_ST_SDIOEN,
        .st_sdio                = true,
        .st_clkdiv              = true,
@@ -232,6 +239,7 @@ static struct variant_data variant_stm32 = {
        .cmdreg_srsp            = MCI_CPSM_RESPONSE,
        .datalength_bits        = 24,
        .datactrl_blocksz       = 11,
+       .datactrl_dpsm_enable   = MCI_DPSM_ENABLE,
        .datactrl_mask_sdio     = MCI_DPSM_ST_SDIOEN,
        .st_sdio                = true,
        .st_clkdiv              = true,
@@ -258,6 +266,7 @@ static struct variant_data variant_qcom = {
        .blksz_datactrl4        = true,
        .datalength_bits        = 24,
        .datactrl_blocksz       = 11,
+       .datactrl_dpsm_enable   = MCI_DPSM_ENABLE,
        .pwrreg_powerup         = MCI_PWR_UP,
        .f_max                  = 208000000,
        .explicit_mclk_control  = true,
@@ -976,11 +985,11 @@ static void mmci_start_data(struct mmci_host *host, struct mmc_data *data)
        BUG_ON(1 << blksz_bits != data->blksz);
 
        if (variant->blksz_datactrl16)
-               datactrl = MCI_DPSM_ENABLE | (data->blksz << 16);
+               datactrl = variant->datactrl_dpsm_enable | (data->blksz << 16);
        else if (variant->blksz_datactrl4)
-               datactrl = MCI_DPSM_ENABLE | (data->blksz << 4);
+               datactrl = variant->datactrl_dpsm_enable | (data->blksz << 4);
        else
-               datactrl = MCI_DPSM_ENABLE | blksz_bits << 4;
+               datactrl = variant->datactrl_dpsm_enable | blksz_bits << 4;
 
        if (data->flags & MMC_DATA_READ)
                datactrl |= MCI_DPSM_DIRECTION;
index 531c247..04d021e 100644 (file)
@@ -222,6 +222,7 @@ struct mmci_host;
  *                  register
  * @datactrl_mask_sdio: SDIO enable mask in datactrl register
  * @datactrl_blksz: block size in power of two
+ * @datactrl_dpsm_enable: enable value for DPSM
  * @pwrreg_powerup: power up value for MMCIPOWER register
  * @f_max: maximum clk frequency supported by the controller.
  * @signal_direction: input/out direction of bus signals can be indicated
@@ -258,6 +259,7 @@ struct variant_data {
        unsigned int            datactrl_mask_ddrmode;
        unsigned int            datactrl_mask_sdio;
        unsigned int            datactrl_blocksz;
+       unsigned int            datactrl_dpsm_enable;
        u8                      st_sdio:1;
        u8                      st_clkdiv:1;
        u8                      blksz_datactrl16:1;