Convert CONFIG_DM9000_BYTE_SWAPPED et al to Kconfig
authorTom Rini <trini@konsulko.com>
Fri, 2 Dec 2022 21:42:18 +0000 (16:42 -0500)
committerTom Rini <trini@konsulko.com>
Thu, 22 Dec 2022 15:31:47 +0000 (10:31 -0500)
This converts the following to Kconfig:
   CONFIG_DM9000_BYTE_SWAPPED
   CONFIG_DM9000_NO_SROM
   CONFIG_DM9000_USE_16BIT
   CONFIG_DM9000_DEBUG
   CONFIG_MXC_GPT_HCLK
   CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC

Signed-off-by: Tom Rini <trini@konsulko.com>
18 files changed:
arch/arm/Kconfig
arch/arm/mach-imx/Kconfig
board/davinci/da8xxevm/Kconfig
board/timll/devkit8000/devkit8000.c
configs/M5253DEMO_defconfig
configs/at91sam9261ek_dataflash_cs0_defconfig
configs/at91sam9261ek_dataflash_cs3_defconfig
configs/at91sam9261ek_nandflash_defconfig
configs/devkit8000_defconfig
drivers/net/Kconfig
include/configs/M5253DEMO.h
include/configs/at91sam9261ek.h
include/configs/brppt2.h
include/configs/ci20.h
include/configs/devkit8000.h
include/configs/mx6_common.h
include/configs/mx7_common.h
include/configs/omapl138_lcdk.h

index d3b11b8..8381e09 100644 (file)
@@ -915,6 +915,7 @@ config ARCH_MX7
        select CPU_V7A
        select GPIO_EXTRA_HEADER
        select MACH_IMX
+       select MXC_GPT_HCLK
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_COMPAT_4
        select SYS_FSL_SEC_LE
@@ -928,6 +929,7 @@ config ARCH_MX6
        select CPU_V7A
        select GPIO_EXTRA_HEADER
        select MACH_IMX
+       select MXC_GPT_HCLK
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_COMPAT_4
        select SYS_FSL_SEC_LE
index ee5f199..3266545 100644 (file)
@@ -18,6 +18,9 @@ config SYSCOUNTER_TIMER
 config GPT_TIMER
        bool
 
+config MXC_GPT_HCLK
+       bool
+
 config IMX_RDC
        bool "i.MX Resource domain controller driver"
        depends on ARCH_MX6 || ARCH_MX7
index c5499a6..34055f6 100644 (file)
@@ -37,6 +37,9 @@ config SYS_VENDOR
 config SYS_CONFIG_NAME
        default "omapl138_lcdk"
 
+config NAND_6BYTES_OOB_FREE_10BYTES_ECC
+       def_bool y
+
 endif
 
 source "board/ti/common/Kconfig"
index 0808ca1..06009d8 100644 (file)
@@ -76,10 +76,11 @@ int board_init(void)
 }
 
 /* Configure GPMC registers for DM9000 */
+#define DM9000_BASE    0x2c000000
 static void gpmc_dm9000_config(void)
 {
        enable_gpmc_cs_config(gpmc_net_config, &gpmc_cfg->cs[6],
-               CONFIG_DM9000_BASE, GPMC_SIZE_16M);
+               DM9000_BASE, GPMC_SIZE_16M);
 }
 
 /*
@@ -100,9 +101,7 @@ int misc_init_r(void)
 #endif
 
 #ifdef CONFIG_DRIVER_DM9000
-       /* Configure GPMC registers for DM9000 */
-       enable_gpmc_cs_config(gpmc_net_config, &gpmc_cfg->cs[6],
-                       CONFIG_DM9000_BASE, GPMC_SIZE_16M);
+       gpmc_dm9000_config();
 
        /* Use OMAP DIE_ID as MAC address */
        if (!eth_env_get_enetaddr("ethaddr", enetaddr)) {
index 581023f..2684ce0 100644 (file)
@@ -44,4 +44,5 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_SYS_MAX_FLASH_SECT=2048
 CONFIG_USE_SYS_MAX_FLASH_BANKS=y
 CONFIG_DRIVER_DM9000=y
+CONFIG_DM9000_BYTE_SWAPPED=y
 CONFIG_MCFUART=y
index c6c83b8..a398e6d 100644 (file)
@@ -54,6 +54,8 @@ CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_DATAFLASH=y
 CONFIG_DRIVER_DM9000=y
+CONFIG_DM9000_NO_SROM=y
+CONFIG_DM9000_USE_16BIT=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_AT91=y
 CONFIG_DM_SERIAL=y
index 1c16d26..1b464ff 100644 (file)
@@ -54,6 +54,8 @@ CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_DATAFLASH=y
 CONFIG_DRIVER_DM9000=y
+CONFIG_DM9000_NO_SROM=y
+CONFIG_DM9000_USE_16BIT=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_AT91=y
 CONFIG_DM_SERIAL=y
index 8dbcb27..f232624 100644 (file)
@@ -52,6 +52,8 @@ CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_DATAFLASH=y
 CONFIG_DRIVER_DM9000=y
+CONFIG_DM9000_NO_SROM=y
+CONFIG_DM9000_USE_16BIT=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_AT91=y
 CONFIG_DM_SERIAL=y
index 8347b67..6fd4410 100644 (file)
@@ -84,4 +84,6 @@ CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
 CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
 CONFIG_DRIVER_DM9000=y
+CONFIG_DM9000_NO_SROM=y
+CONFIG_DM9000_USE_16BIT=y
 CONFIG_JFFS2_NAND=y
index 4e5da5a..0607f95 100644 (file)
@@ -198,6 +198,18 @@ config DRIVER_DM9000
        help
          The Davicom DM9000 parallel bus external ethernet interface chip.
 
+config DM9000_BYTE_SWAPPED
+       bool "Byte swapped access for DM9000"
+       depends on DRIVER_DM9000
+
+config DM9000_NO_SROM
+       bool "No SROM on DM9000"
+       depends on DRIVER_DM9000
+
+config DM9000_USE_16BIT
+       bool "Use 16bit access in DM9000"
+       depends on DRIVER_DM9000
+
 config DWC_ETH_QOS
        bool "Synopsys DWC Ethernet QOS device support"
        select PHYLIB
index 7e37c6d..ad55938 100644 (file)
        env/embedded.o(.text*);
 
 #ifdef CONFIG_DRIVER_DM9000
-#      define CONFIG_DM9000_BASE       (CFG_SYS_CS1_BASE | 0x300)
-#      define DM9000_IO                CONFIG_DM9000_BASE
-#      define DM9000_DATA              (CONFIG_DM9000_BASE + 4)
-#      undef CONFIG_DM9000_DEBUG
-#      define CONFIG_DM9000_BYTE_SWAPPED
-
 #      define CONFIG_OVERWRITE_ETHADDR_ONCE
 
 #      define CONFIG_EXTRA_ENV_SETTINGS                \
index 56247e3..39f6ff8 100644 (file)
 
 #endif
 
-/* Ethernet */
-#define CONFIG_DM9000_BASE             0x30000000
-#define DM9000_IO                      CONFIG_DM9000_BASE
-#define DM9000_DATA                    (CONFIG_DM9000_BASE + 4)
-#define CONFIG_DM9000_USE_16BIT
-#define CONFIG_DM9000_NO_SROM
-
 /* USB */
 #define CFG_SYS_USB_OHCI_REGS_BASE             0x00500000      /* AT91SAM9261_UHP_BASE */
 
index d35c7c4..80104b2 100644 (file)
@@ -16,8 +16,6 @@
 #define CFG_SYS_PL310_BASE             L2_PL310_BASE
 #endif /* !CONFIG_SYS_L2CACHE_OFF */
 
-#define CONFIG_MXC_GPT_HCLK
-
 /* MMC */
 
 /* Boot */
index 3329c24..446d5c4 100644 (file)
 /* NS16550-ish UARTs */
 #define CFG_SYS_NS16550_CLK            48000000
 
-/* Ethernet: davicom DM9000 */
-#define CONFIG_DM9000_BASE             0xb6000000
-#define DM9000_IO                      CONFIG_DM9000_BASE
-#define DM9000_DATA                    (CONFIG_DM9000_BASE + 2)
-
-/* Miscellaneous configuration options */
-
 #endif /* __CONFIG_CI20_H__ */
index 4641059..e3621fd 100644 (file)
 
 #include <configs/ti_omap3_common.h>
 
-/* Hardware drivers */
-/* DM9000 */
-#define        CONFIG_DM9000_BASE              0x2c000000
-#define        DM9000_IO                       CONFIG_DM9000_BASE
-#define        DM9000_DATA                     (CONFIG_DM9000_BASE + 0x400)
-#define        CONFIG_DM9000_USE_16BIT         1
-#define CONFIG_DM9000_NO_SROM          1
-#undef CONFIG_DM9000_DEBUG
-
-/* TWL4030 */
-
 /* BOOTP/DHCP options */
 
 #define MEM_LAYOUT_ENV_SETTINGS \
index 245530a..dd8cabc 100644 (file)
@@ -16,7 +16,6 @@
 #endif
 
 #endif
-#define CONFIG_MXC_GPT_HCLK
 
 #include <linux/sizes.h>
 #include <asm/arch/imx-regs.h>
index d5af699..6e14b4f 100644 (file)
@@ -14,7 +14,6 @@
 #include <asm/mach-imx/gpio.h>
 
 /* Timer settings */
-#define CONFIG_MXC_GPT_HCLK
 #define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */
 
 /* Miscellaneous configurable options */
index 788a111..f19211f 100644 (file)
 #define CFG_SYS_NAND_BASE              DAVINCI_ASYNC_EMIF_DATA_CE3_BASE
 #define CFG_SYS_NAND_MASK_CLE  0x10
 #define CFG_SYS_NAND_MASK_ALE  0x8
-#define CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC
 #define CFG_SYS_NAND_U_BOOT_SIZE       SZ_512K
 #define CFG_SYS_NAND_U_BOOT_DST        0xc1080000
 #define CFG_SYS_NAND_U_BOOT_START      CFG_SYS_NAND_U_BOOT_DST