+2013-08-23 Yuri Chornoivan <yurchor@ukr.net>
+
+ PR binutils/15834
+ * bfdio.c: Fix typos.
+ * elf32-spu.c: Likewise.
+ * elfnn-aarch64.c: Likewise.
+
2013-08-21 Tristan Gingold <gingold@adacore.com>
* coff-rs6000.c (_bfd_xcoff_sizeof_headers): Also count
/* Low-level I/O routines for BFDs.
- Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
- 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2011
- Free Software Foundation, Inc.
+ Copyright 1990-2013 Free Software Foundation, Inc.
Written by Cygnus Support.
#ifdef VMS
char *vms_attr;
- /* On VMS, fopen allows file attributes as optionnal arguments.
+ /* On VMS, fopen allows file attributes as optional arguments.
We need to use them but we'd better to use the common prototype.
In fopen-vms.h, they are separated from the mode with a comma.
Split here. */
/* SPU specific support for 32-bit ELF
- Copyright 2006, 2007, 2008, 2009, 2010, 2011, 2012
- Free Software Foundation, Inc.
+ Copyright 2006-2013 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
}
/* Support two sizes of overlay stubs, a slower more compact stub of two
- intructions, and a faster stub of four instructions.
+ instructions, and a faster stub of four instructions.
Soft-icache stubs are four or eight words. */
static unsigned int
plt_entry + 4,
PG_OFFSET (gotplt_entry_address));
- /* Fill in the the lo12 bits for the add from the pltgot entry. */
+ /* Fill in the lo12 bits for the add from the pltgot entry. */
elf_aarch64_update_plt_entry (output_bfd, BFD_RELOC_AARCH64_ADD_LO12,
plt_entry + 8,
PG_OFFSET (gotplt_entry_address));
+2013-08-23 Yuri Chornoivan <yurchor@ukr.net>
+
+ PR binutils/15834
+ * od-xcoff.c: Fix typos.
+
2013-08-19 Tristan Gingold <gingold@adacore.com>
* nm.c (print_size_symbols): Directly get symbol size.
/* od-xcoff.c -- dump information about an xcoff object file.
- Copyright 2011, 2012 Free Software Foundation, Inc.
+ Copyright 2011-2013 Free Software Foundation, Inc.
Written by Tristan Gingold, Adacore.
This file is part of GNU Binutils.
}
if (data->opthdr > sizeof (auxhdr))
{
- printf (_("warning: optionnal header size too large (> %d)\n"),
+ printf (_("warning: optional header size too large (> %d)\n"),
(int)sizeof (auxhdr));
sz = sizeof (auxhdr);
}
+2013-08-23 Yuri Chornoivan <yurchor@ukr.net>
+
+ PR binutils/15834
+ * config/tc-ia64.c: Fix typos.
+ * config/tc-sparc.c: Likewise.
+ * config/tc-z80.c: Likewise.
+ * doc/c-i386.texi: Likewise.
+ * doc/c-m32r.texi: Likewise.
+
2013-08-23 Will Newton <will.newton@linaro.org>
- * config/tc-arm.c (do_neon_ldx_stx): Add extra constraints
+ * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
for pre-indexed addressing modes.
2013-08-21 Alan Modra <amodra@gmail.com>
/* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
- Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
- 2008, 2009, 2011, 2012, 2013 Free Software Foundation, Inc.
+ Copyright 1998-2013 Free Software Foundation, Inc.
Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
This file is part of GAS, the GNU Assembler.
}
/* This function converts a rs_machine_dependent variant frag into a
- normal fill frag with the unwind image from the the record list. */
+ normal fill frag with the unwind image from the record list. */
void
ia64_convert_frag (fragS *frag)
{
/* tc-sparc.c -- Assemble for the SPARC
- Copyright 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
- 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010,
- 2011
- Free Software Foundation, Inc.
+ Copyright 1989-2013 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
GAS is free software; you can redistribute it and/or modify
return special_case;
}
- /* Make sure the the hwcaps used by the instruction are
+ /* Make sure the hwcaps used by the instruction are
currently enabled. */
if (hwcaps & ~hwcap_allowed)
{
p = parse_exp (args, &term);
if (*p++ != ',')
{
- error (_("bad intruction syntax"));
+ error (_("bad instruction syntax"));
return p;
}
p = parse_exp (args, &term);
if (*p++ != ',')
{
- error (_("bad intruction syntax"));
+ error (_("bad instruction syntax"));
return p;
}
p = parse_exp (args, &b);
if (*p++ != ',')
- error (_("bad intruction syntax"));
+ error (_("bad instruction syntax"));
bn = b.X_add_number;
if ((!b.X_md)
p = parse_exp (args, ®);
if (*p++ != ',')
{
- error (_("bad intruction syntax"));
+ error (_("bad instruction syntax"));
return p;
}
p = parse_exp (args, & port);
if (*p++ != ',')
{
- error (_("bad intruction syntax"));
+ error (_("bad instruction syntax"));
return p;
}
p = parse_exp (p, ®);
p = parse_exp (args, &dst);
if (*p++ != ',')
- error (_("bad intruction syntax"));
+ error (_("bad instruction syntax"));
p = parse_exp (p, &src);
switch (dst.X_op)
-@c Copyright 1991, 1992, 1993, 1994, 1995, 1997, 1998, 1999, 2000,
-@c 2001, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2011
-@c Free Software Foundation, Inc.
+@c Copyright 1991-2013 Free Software Foundation, Inc.
@c This is part of the GAS manual.
@c For copying conditions, see the file as.texinfo.
@c man end
@item -msse-check=@var{none}
@itemx -msse-check=@var{warning}
@itemx -msse-check=@var{error}
-These options control if the assembler should check SSE intructions.
+These options control if the assembler should check SSE instructions.
@option{-msse-check=@var{none}} will make the assembler not to check SSE
instructions, which is the default. @option{-msse-check=@var{warning}}
-will make the assembler issue a warning for any SSE intruction.
+will make the assembler issue a warning for any SSE instruction.
@option{-msse-check=@var{error}} will make the assembler issue an error
-for any SSE intruction.
+for any SSE instruction.
@cindex @samp{-mavxscalar=} option, i386
@cindex @samp{-mavxscalar=} option, x86-64
-@c Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
-@c 2000, 2003, 2004, 2006
-@c Free Software Foundation, Inc.
+@c Copyright 1991-2013 Free Software Foundation, Inc.
@c This is part of the GAS manual.
@c For copying conditions, see the file as.texinfo.
@ifset GENERIC
@cindex @samp{-m32rx} option, M32R2
@cindex architecture options, M32R2
@cindex M32R architecture options
-This option changes the target processor to the the M32R2
+This option changes the target processor to the M32R2
microprocessor.
@item -m32r
+2013-08-23 Yuri Chornoivan <yurchor@ukr.net>
+
+ PR binutils/15834
+ * gas/d10v/instruction_packing.d: Fix typos.
+ * gas/z80/atend.d: Likewise.
+
2013-08-23 Will Newton <will.newton@linaro.org>
* testsuite/gas/arm/neon-addressing-bad.l: Add test for
#objdump: -Dr
-#name: D10V intruction packing
+#name: D10V instruction packing
#as: -W
.*: +file format elf32-d10v
#objdump: -d
-#name: index intructions with label as offset
+#name: index instructions with label as offset
.*: .*
+2013-08-23 Yuri Chornoivan <yurchor@ukr.net>
+
+ PR binutils/15834
+ * object.h: Fix typos.
+
2013-08-16 Roland McGrath <mcgrathr@google.com>
* i386.cc (Target_i386_nacl::do_code_fill): New virtual function.
return this->output_sections_[shndx] != NULL;
}
- // The the output section of the input section with index SHNDX.
+ // The output section of the input section with index SHNDX.
// This is only used currently to remove a section from the link in
// relaxation.
void
+2013-08-23 Yuri Chornoivan <yurchor@ukr.net>
+
+ PR binutils/15834
+ * i960.h: Fix typos.
+
2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
* mips.h: Remove references to "+I" and imm2_expr.
2008-04-28 Adam Nemet <anemet@caviumnetworks.com>
- * mips.h (INSN_MACRO): Move it up to the the pinfo macros.
+ * mips.h (INSN_MACRO): Move it up to the pinfo macros.
(INSN2_M_FP_S, INSN2_M_FP_D): New pinfo2 macros.
2008-04-14 Edmar Wienskoski <edmar@freescale.com>
/* Basic 80960 instruction formats.
- Copyright 2001, 2010 Free Software Foundation, Inc.
+ Copyright 2001-2013 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
char operand[3];/* Operand descriptors; same order as assembler instr */
};
-/* Classes of 960 intructions:
+/* Classes of 960 instructions:
* - each instruction falls into one class.
* - each target architecture supports one or more classes.
*
+2013-08-23 Yuri Chornoivan <yurchor@ukr.net>
+
+ PR binutils/15834
+ * ld-mips-elf/mips16-pic-1.inc: Fix typos.
+
2013-08-22 Alan Modra <amodra@gmail.com>
* ld-powerpc/powerpc.exp: Substitute for le in options_regsub(ld).
# Declare a function called NAME and an __fn_NAME stub for it.
- # Make the stub use la_TYPE to load the the target address into $2.
+ # Make the stub use la_TYPE to load the target address into $2.
.macro stub,name,type
.set nomips16
.section .mips16.fn.\name, "ax", @progbits
+2013-08-23 Yuri Chornoivan <yurchor@ukr.net>
+
+ PR binutils/15834
+ * aarch64-asm.c: Fix typos.
+ * aarch64-dis.c: Likewise.
+ * msp430-dis.c: Likewise.
+
2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
* micromips-opc.c (micromips_opcodes): Replace "dext" and "dins"
/* aarch64-asm.c -- AArch64 assembler support.
- Copyright 2012, 2013 Free Software Foundation, Inc.
+ Copyright 2012-2013 Free Software Foundation, Inc.
Contributed by ARM Ltd.
This file is part of the GNU opcodes library.
N.B. the fields are required to be in such an order than the least signficant
field for VALUE comes the first, e.g. the <index> in
SQDMLAL <Va><d>, <Vb><n>, <Vm>.<Ts>[<index>]
- is encoded in H:L:M in some cases, the the fields H:L:M should be passed in
+ is encoded in H:L:M in some cases, the fields H:L:M should be passed in
the order of M, L, H. */
static inline void
/* aarch64-dis.c -- AArch64 disassembler.
- Copyright 2009, 2010, 2011, 2012, 2013 Free Software Foundation, Inc.
+ Copyright 2009-2013 Free Software Foundation, Inc.
Contributed by ARM Ltd.
This file is part of the GNU opcodes library.
N.B. the fields are required to be in such an order than the most signficant
field for VALUE comes the first, e.g. the <index> in
SQDMLAL <Va><d>, <Vb><n>, <Vm>.<Ts>[<index>]
- is encoded in H:L:M in some cases, the the fields H:L:M should be passed in
+ is encoded in H:L:M in some cases, the fields H:L:M should be passed in
the order of H, L, M. */
static inline aarch64_insn
break;
default:
- strcpy (comm1, _("unercognised CALLA addressing mode"));
+ strcpy (comm1, _("unrecognised CALLA addressing mode"));
return -1;
}
projects / platform / upstream / binutils.git / commitdiff