bfd/

	* elf32-arm.c (elf32_arm_stub_long_branch_any_arm_pic,
	elf32_arm_stub_long_branch_any_arm_pic): Use a consistent name for
	ip/r12.
	(arm_type_of_stub): Remove superfluous braces.

	gas/
	* config/tc-arm.c (encode_branch): Remove superfluous braces.
	(do_t_branch): Move reloc setting to end of routine.

diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index f7d2587..c21a0f9 100644 (file)
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,10 @@
+2010-10-06  Nathan Sidwell  <nathan@codesourcery.com>
+
+       * elf32-arm.c (elf32_arm_stub_long_branch_any_arm_pic, 
+       elf32_arm_stub_long_branch_any_arm_pic): Use a consistent name for
+       ip/r12.
+       (arm_type_of_stub): Remove superfluous braces.
+
 2010-10-04  Bernd Schmidt  <bernds@codesourcery.com>
 
        * elf-bfd.h (struct bfd_elf_section_reloc_data): New structure.

diff --git a/bfd/elf32-arm.c b/bfd/elf32-arm.c
index fb3e0a3..8728949 100644 (file)
--- a/bfd/elf32-arm.c
+++ b/bfd/elf32-arm.c
@@ -2106,7 +2106,7 @@ static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
    blx to reach the stub if necessary.  */
 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
   {
-    ARM_INSN(0xe59fc000),             /* ldr   r12, [pc] */
+    ARM_INSN(0xe59fc000),             /* ldr   ip, [pc] */
     ARM_INSN(0xe08ff00c),             /* add   pc, pc, ip */
     DATA_WORD(0, R_ARM_REL32, -4),    /* dcd   R_ARM_REL32(X-4) */
   };
@@ -2117,7 +2117,7 @@ static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
    ARMv7).  */
 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
   {
-    ARM_INSN(0xe59fc004),             /* ldr   r12, [pc, #4] */
+    ARM_INSN(0xe59fc004),             /* ldr   ip, [pc, #4] */
     ARM_INSN(0xe08fc00c),             /* add   ip, pc, ip */
     ARM_INSN(0xe12fff1c),             /* bx    ip */
     DATA_WORD(0, R_ARM_REL32, 0),     /* dcd   R_ARM_REL32(X) */
@@ -3269,9 +3269,7 @@ arm_type_of_stub (struct bfd_link_info *info,
 
   /* If a stub is needed, record the actual destination type.  */
   if (stub_type != arm_stub_none)
-    {
-      *actual_st_type = st_type;
-    }
+    *actual_st_type = st_type;
 
   return stub_type;
 }

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 6f3529e..6031f59 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2010-10-06  Nathan Sidwell  <nathan@codesourcery.com>
+
+       * config/tc-arm.c (encode_branch): Remove superfluous braces.
+       (do_t_branch): Move reloc setting to end of routine.
+
 2010-10-04  David Daney  <ddaney@caviumnetworks.com>
 
        * config/tc-mips.c (mips_fix_cn63xxp1): New variable.

diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index fc3d63d..69ff36a 100644 (file)
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -7285,9 +7285,7 @@ encode_branch (int default_reloc)
       inst.reloc.type  = BFD_RELOC_ARM_PLT32;
     }
   else
-    {
-      inst.reloc.type = (bfd_reloc_code_real_type) default_reloc;
-    }
+    inst.reloc.type = (bfd_reloc_code_real_type) default_reloc;
   inst.reloc.pc_rel = 1;
 }
 
@@ -9666,6 +9664,7 @@ do_t_branch (void)
 {
   int opcode;
   int cond;
+  int reloc;
 
   cond = inst.cond;
   set_it_insn_type (IF_INSIDE_IT_LAST_INSN);
@@ -9688,29 +9687,29 @@ do_t_branch (void)
     {
       inst.instruction = THUMB_OP32(opcode);
       if (cond == COND_ALWAYS)
-       inst.reloc.type = BFD_RELOC_THUMB_PCREL_BRANCH25;
+       reloc = BFD_RELOC_THUMB_PCREL_BRANCH25;
       else
        {
          gas_assert (cond != 0xF);
          inst.instruction |= cond << 22;
-         inst.reloc.type = BFD_RELOC_THUMB_PCREL_BRANCH20;
+         reloc = BFD_RELOC_THUMB_PCREL_BRANCH20;
        }
     }
   else
     {
       inst.instruction = THUMB_OP16(opcode);
       if (cond == COND_ALWAYS)
-       inst.reloc.type = BFD_RELOC_THUMB_PCREL_BRANCH12;
+       reloc = BFD_RELOC_THUMB_PCREL_BRANCH12;
       else
        {
          inst.instruction |= cond << 8;
-         inst.reloc.type = BFD_RELOC_THUMB_PCREL_BRANCH9;
+         reloc = BFD_RELOC_THUMB_PCREL_BRANCH9;
        }
       /* Allow section relaxation.  */
       if (unified_syntax && inst.size_req != 2)
        inst.relax = opcode;
     }
-
+  inst.reloc.type = reloc;
   inst.reloc.pc_rel = 1;
 }