#include "util/bitscan.h"
#include "compiler/nir/nir.h"
#include "pipe/p_state.h"
+#include "nir_legacy.h"
#include "ppir.h"
}
static void *ppir_node_create_reg(ppir_block *block, ppir_op op,
- nir_register *reg, unsigned mask)
+ nir_ssa_def *def, unsigned mask)
{
- ppir_node *node = ppir_node_create(block, op, reg->index, mask);
+ ppir_node *node = ppir_node_create(block, op, def->index, mask);
if (!node)
return NULL;
ppir_dest *dest = ppir_node_get_dest(node);
list_for_each_entry(ppir_reg, r, &block->comp->reg_list, list) {
- if (r->index == reg->index) {
+ if (r->index == def->index) {
dest->reg = r;
break;
}
}
static void *ppir_node_create_dest(ppir_block *block, ppir_op op,
- nir_dest *dest, unsigned mask)
+ nir_legacy_dest *dest, unsigned mask)
{
unsigned index = -1;
if (dest) {
if (dest->is_ssa)
- return ppir_node_create_ssa(block, op, &dest->ssa);
+ return ppir_node_create_ssa(block, op, dest->ssa);
else
- return ppir_node_create_reg(block, op, dest->reg.reg, mask);
+ return ppir_node_create_reg(block, op, dest->reg.handle, mask);
}
return ppir_node_create(block, op, index, 0);
}
static void ppir_node_add_src(ppir_compiler *comp, ppir_node *node,
- ppir_src *ps, nir_src *ns, unsigned mask)
+ ppir_src *ps, nir_legacy_src *ns, unsigned mask)
{
ppir_node *child = NULL;
ppir_node_add_dep(node, child, ppir_dep_src);
}
else {
- nir_register *reg = ns->reg.reg;
+ nir_reg_src *rs = &ns->reg;
while (mask) {
int swizzle = ps->swizzle[u_bit_scan(&mask)];
- child = comp->var_nodes[(reg->index << 2) + comp->reg_base + swizzle];
+ child = comp->var_nodes[(rs->handle->index << 2) + swizzle];
/* Reg is read before it was written, create a dummy node for it */
if (!child) {
- child = ppir_node_create_reg(node->block, ppir_op_dummy, reg,
+ child = ppir_node_create_reg(node->block, ppir_op_dummy, rs->handle,
u_bit_consecutive(0, 4));
- comp->var_nodes[(reg->index << 2) + comp->reg_base + swizzle] = child;
+ comp->var_nodes[(rs->handle->index << 2) + swizzle] = child;
}
/* Don't add dummies or recursive deps for ops like r1 = r1 + ssa1 */
if (child && node != child && child->op != ppir_op_dummy)
static bool ppir_emit_alu(ppir_block *block, nir_instr *ni)
{
nir_alu_instr *instr = nir_instr_as_alu(ni);
+ nir_dest *dst = &instr->dest.dest;
int op = nir_to_ppir_opcodes[instr->op];
if (op == ppir_op_unsupported) {
ppir_error("unsupported nir_op: %s\n", nir_op_infos[instr->op].name);
return false;
}
+ nir_legacy_alu_dest legacy_dest = nir_legacy_chase_alu_dest(dst);
- ppir_alu_node *node = ppir_node_create_dest(block, op, &instr->dest.dest,
- instr->dest.write_mask);
+ /* Don't try to translate folded fsat since their source won't be valid */
+ if (instr->op == nir_op_fsat && nir_legacy_fsat_folds(instr))
+ return true;
+
+ /* Skip folded fabs/fneg since we do not have dead code elimination */
+ if ((instr->op == nir_op_fabs || instr->op == nir_op_fneg) &&
+ nir_legacy_float_mod_folds(instr)) {
+ /* Add parent node as a the folded dest ssa node to keep
+ * the dependency chain */
+ nir_alu_src *ns = &instr->src[0];
+ assert(ns->src.is_ssa);
+ ppir_node *parent = block->comp->var_nodes[ns->src.ssa->index];
+ assert(parent);
+ block->comp->var_nodes[dst->ssa.index] = parent;
+ return true;
+ }
+
+ ppir_alu_node *node = ppir_node_create_dest(block, op, &legacy_dest.dest,
+ legacy_dest.write_mask);
if (!node)
return false;
ppir_dest *pd = &node->dest;
- nir_alu_dest *nd = &instr->dest;
- if (nd->saturate)
+ if (legacy_dest.fsat)
pd->modifier = ppir_outmod_clamp_fraction;
unsigned src_mask;
node->num_src = num_child;
for (int i = 0; i < num_child; i++) {
- nir_alu_src *ns = instr->src + i;
+ nir_legacy_alu_src ns = nir_legacy_chase_alu_src(instr->src + i, true);
ppir_src *ps = node->src + i;
- memcpy(ps->swizzle, ns->swizzle, sizeof(ps->swizzle));
- ppir_node_add_src(block->comp, &node->node, ps, &ns->src, src_mask);
+ memcpy(ps->swizzle, ns.swizzle, sizeof(ps->swizzle));
+ ppir_node_add_src(block->comp, &node->node, ps, &ns.src, src_mask);
- ps->absolute = ns->abs;
- ps->negate = ns->negate;
+ ps->absolute = ns.fabs;
+ ps->negate = ns.fneg;
}
list_addtail(&node->node.list, &block->node_list);
branch = ppir_node_to_branch(node);
/* second src and condition will be updated during lowering */
+ nir_legacy_src legacy_src = nir_legacy_chase_src(&instr->src[0]);
ppir_node_add_src(block->comp, node, &branch->src[0],
- &instr->src[0], u_bit_consecutive(0, instr->num_components));
+ &legacy_src, u_bit_consecutive(0, instr->num_components));
branch->num_src = 1;
branch->target = comp->discard_block;
ppir_alu_node *alu_node;
switch (instr->intrinsic) {
- case nir_intrinsic_load_input:
- if (!instr->dest.is_ssa)
- mask = u_bit_consecutive(0, instr->num_components);
+ case nir_intrinsic_decl_reg:
+ case nir_intrinsic_store_reg:
+ /* Nothing to do for these */
+ return true;
+
+ case nir_intrinsic_load_reg: {
+ nir_legacy_dest legacy_dest = nir_legacy_chase_dest(&instr->dest);
+ lnode = ppir_node_create_dest(block, ppir_op_dummy, &legacy_dest, mask);
+ return true;
+ }
- lnode = ppir_node_create_dest(block, ppir_op_load_varying, &instr->dest, mask);
+ case nir_intrinsic_load_input: {
+ mask = u_bit_consecutive(0, instr->num_components);
+
+ nir_legacy_dest legacy_dest = nir_legacy_chase_dest(&instr->dest);
+ lnode = ppir_node_create_dest(block, ppir_op_load_varying, &legacy_dest, mask);
if (!lnode)
return false;
lnode->index += (uint32_t)(nir_src_as_float(instr->src[0]) * 4);
else {
lnode->num_src = 1;
- ppir_node_add_src(block->comp, &lnode->node, &lnode->src, instr->src, 1);
+ nir_legacy_src legacy_src = nir_legacy_chase_src(instr->src);
+ ppir_node_add_src(block->comp, &lnode->node, &lnode->src, &legacy_src, 1);
}
list_addtail(&lnode->node.list, &block->node_list);
return true;
+ }
case nir_intrinsic_load_frag_coord:
case nir_intrinsic_load_point_coord:
- case nir_intrinsic_load_front_face:
- if (!instr->dest.is_ssa)
- mask = u_bit_consecutive(0, instr->num_components);
+ case nir_intrinsic_load_front_face: {
+ assert(instr->dest.is_ssa);
+ mask = u_bit_consecutive(0, instr->num_components);
ppir_op op;
switch (instr->intrinsic) {
break;
}
- lnode = ppir_node_create_dest(block, op, &instr->dest, mask);
+ nir_legacy_dest legacy_dest = nir_legacy_chase_dest(&instr->dest);
+ lnode = ppir_node_create_dest(block, op, &legacy_dest, mask);
if (!lnode)
return false;
lnode->num_components = instr->num_components;
list_addtail(&lnode->node.list, &block->node_list);
return true;
+ }
- case nir_intrinsic_load_uniform:
- if (!instr->dest.is_ssa)
- mask = u_bit_consecutive(0, instr->num_components);
+ case nir_intrinsic_load_uniform: {
+ mask = u_bit_consecutive(0, instr->num_components);
- lnode = ppir_node_create_dest(block, ppir_op_load_uniform, &instr->dest, mask);
+ nir_legacy_dest legacy_dest = nir_legacy_chase_dest(&instr->dest);
+ lnode = ppir_node_create_dest(block, ppir_op_load_uniform, &legacy_dest, mask);
if (!lnode)
return false;
lnode->index += (uint32_t)nir_src_as_float(instr->src[0]);
else {
lnode->num_src = 1;
- ppir_node_add_src(block->comp, &lnode->node, &lnode->src, instr->src, 1);
+ nir_legacy_src legacy_src = nir_legacy_chase_src(instr->src);
+ ppir_node_add_src(block->comp, &lnode->node, &lnode->src, &legacy_src, 1);
}
list_addtail(&lnode->node.list, &block->node_list);
return true;
+ }
case nir_intrinsic_store_output: {
/* In simple cases where the store_output is ssa, that register
return false;
}
- if (!block->comp->uses_discard && instr->src->is_ssa) {
+ assert(instr->src->is_ssa);
+ if (!block->comp->uses_discard) {
node = block->comp->var_nodes[instr->src->ssa->index];
+ assert(node);
switch (node->op) {
case ppir_op_load_uniform:
case ppir_op_load_texture:
+ case ppir_op_dummy:
case ppir_op_const:
break;
default: {
for (int i = 0; i < instr->num_components; i++)
alu_node->src[0].swizzle[i] = i;
- ppir_node_add_src(block->comp, &alu_node->node, alu_node->src, instr->src,
+ nir_legacy_src legacy_src = nir_legacy_chase_src(instr->src);
+ ppir_node_add_src(block->comp, &alu_node->node, alu_node->src, &legacy_src,
u_bit_consecutive(0, instr->num_components));
alu_node->node.is_out = 1;
/* emit ld_tex node */
unsigned mask = 0;
- if (!instr->dest.is_ssa)
- mask = u_bit_consecutive(0, nir_tex_instr_dest_size(instr));
+ mask = u_bit_consecutive(0, nir_tex_instr_dest_size(instr));
- node = ppir_node_create_dest(block, ppir_op_load_texture, &instr->dest, mask);
+ nir_legacy_dest legacy_dest = nir_legacy_chase_dest(&instr->dest);
+ node = ppir_node_create_dest(block, ppir_op_load_texture, &legacy_dest, mask);
if (!node)
return false;
FALLTHROUGH;
case nir_tex_src_coord: {
nir_src *ns = &instr->src[i].src;
- if (ns->is_ssa) {
- ppir_node *child = block->comp->var_nodes[ns->ssa->index];
- if (child->op == ppir_op_load_varying) {
- /* If the successor is load_texture, promote it to load_coords */
- nir_tex_src *nts = (nir_tex_src *)ns;
- if (nts->src_type == nir_tex_src_coord ||
- nts->src_type == nir_tex_src_backend1)
- child->op = ppir_op_load_coords;
- }
+ assert(ns->is_ssa);
+ ppir_node *child = block->comp->var_nodes[ns->ssa->index];
+ if (child->op == ppir_op_load_varying) {
+ /* If the successor is load_texture, promote it to load_coords */
+ nir_tex_src *nts = (nir_tex_src *)ns;
+ if (nts->src_type == nir_tex_src_coord ||
+ nts->src_type == nir_tex_src_backend1)
+ child->op = ppir_op_load_coords;
}
/* src[0] is not used by the ld_tex instruction but ensures
* correct scheduling due to the pipeline dependency */
- ppir_node_add_src(block->comp, &node->node, &node->src[0], &instr->src[i].src,
+ nir_legacy_src legacy_src = nir_legacy_chase_src(&instr->src[i].src);
+ ppir_node_add_src(block->comp, &node->node, &node->src[0], &legacy_src,
u_bit_consecutive(0, instr->coord_components));
node->num_src++;
break;
case nir_tex_src_lod:
node->lod_bias_en = true;
node->explicit_lod = (instr->src[i].src_type == nir_tex_src_lod);
- ppir_node_add_src(block->comp, &node->node, &node->src[1], &instr->src[i].src, 1);
+ nir_legacy_src legacy_src = nir_legacy_chase_src(&instr->src[i].src);
+ ppir_node_add_src(block->comp, &node->node, &node->src[1], &legacy_src, 1);
node->num_src++;
break;
default:
if (!node)
return false;
else_branch = ppir_node_to_branch(node);
+ nir_legacy_src legacy_src = nir_legacy_chase_src(&if_stmt->condition);
ppir_node_add_src(block->comp, node, &else_branch->src[0],
- &if_stmt->condition, 1);
+ &legacy_src, 1);
else_branch->num_src = 1;
/* Negate condition to minimize branching. We're generating following:
* current_block: { ...; if (!statement) branch else_block; }
return true;
}
-static ppir_compiler *ppir_compiler_create(void *prog, unsigned num_reg, unsigned num_ssa)
+static ppir_compiler *ppir_compiler_create(void *prog, unsigned num_ssa)
{
ppir_compiler *comp = rzalloc_size(
- prog, sizeof(*comp) + ((num_reg << 2) + num_ssa) * sizeof(ppir_node *));
+ prog, sizeof(*comp) + (num_ssa << 2) * sizeof(ppir_node *));
if (!comp)
return NULL;
comp->blocks = _mesa_hash_table_u64_create(prog);
comp->var_nodes = (ppir_node **)(comp + 1);
- comp->reg_base = num_ssa;
comp->prog = prog;
return comp;
struct util_debug_callback *debug)
{
nir_function_impl *func = nir_shader_get_entrypoint(nir);
- ppir_compiler *comp = ppir_compiler_create(prog, func->reg_alloc, func->ssa_alloc);
+ assert(func->reg_alloc == 0);
+ ppir_compiler *comp = ppir_compiler_create(prog, func->ssa_alloc);
if (!comp)
return false;
for (int i = 0; i < ppir_output_num; i++)
comp->out_type_to_reg[i] = -1;
- foreach_list_typed(nir_register, reg, node, &func->registers) {
+ nir_foreach_reg_decl(decl, func) {
ppir_reg *r = rzalloc(comp, ppir_reg);
if (!r)
return false;
- r->index = reg->index;
- r->num_components = reg->num_components;
+ r->index = decl->dest.ssa.index;
+ r->num_components = nir_intrinsic_num_components(decl);
r->is_head = false;
list_addtail(&r->list, &comp->reg_list);
comp->reg_num++;