re PR rtl-optimization/45903 (unnecessary load of 32/64bit variable when only 8 bits...

	PR tree-optimization/45903
	* simplify-rtx.c (simplify_subreg): Optimize lowpart SUBREG
	of *SHIFTRT of MEM.

	* gcc.target/i386/pr45903.c: New test.

From-SVN: r165202

diff --git a/gcc/testsuite/gcc.target/i386/pr45903.c b/gcc/testsuite/gcc.target/i386/pr45903.c
new file mode 100644 (file)
index 0000000..5cb642a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr45903.c
@@ -0,0 +1,44 @@
+/* PR tree-optimization/45903 */
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+unsigned long long a, b;
+unsigned char c;
+
+void
+f1 (void)
+{
+  c = (a >> 8) + (b >> 8);
+}
+
+void
+f2 (void)
+{
+  c = (a >> 8) | (b >> 8);
+}
+
+void
+f3 (void)
+{
+  c = (a >> 16) ^ (b >> 56);
+}
+
+unsigned char
+f4 (void)
+{
+  return (a >> 48) + (b >> 40);
+}
+
+unsigned char
+f5 (void)
+{
+  return (a >> 32) | (b >> 16);
+}
+
+unsigned char
+f6 (void)
+{
+  return (a >> 24) ^ (b >> 32);
+}
+
+/* { dg-final { scan-assembler-not "shr\[qdl\]" } } */