selftests/powerpc/pmu/: Add interface test for mmcr0_pmcjce field

The testcase uses event code 0x500fa ("instructions") to verify the
PMCjCE bit setting in Monitor Mode Control Register 0 (MMCR0). This bit
is expected to be set in MMCR0 when using Performance Monitor Counter
5 (PMC5). Checks if perf interface sets this bit correctly.

Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
[mpe: Add error checking, drop GET_MMCR_FIELD, add to .gitignore]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20220127072012.662451-13-kjain@linux.ibm.com

diff --git a/tools/testing/selftests/powerpc/pmu/sampling_tests/.gitignore b/tools/testing/selftests/powerpc/pmu/sampling_tests/.gitignore
index 991ed33..0bc68fe 100644 (file)
--- a/tools/testing/selftests/powerpc/pmu/sampling_tests/.gitignore
+++ b/tools/testing/selftests/powerpc/pmu/sampling_tests/.gitignore
@@ -1,3 +1,4 @@
 mmcr0_exceptionbits_test
 mmcr0_cc56run_test
 mmcr0_pmccext_test
+mmcr0_pmcjce_test

diff --git a/tools/testing/selftests/powerpc/pmu/sampling_tests/Makefile b/tools/testing/selftests/powerpc/pmu/sampling_tests/Makefile
index 7feaf5d..28029c0 100644 (file)
--- a/tools/testing/selftests/powerpc/pmu/sampling_tests/Makefile
+++ b/tools/testing/selftests/powerpc/pmu/sampling_tests/Makefile
@@ -1,7 +1,8 @@
 # SPDX-License-Identifier: GPL-2.0
 CFLAGS += -m64
 
-TEST_GEN_PROGS := mmcr0_exceptionbits_test mmcr0_cc56run_test mmcr0_pmccext_test
+TEST_GEN_PROGS := mmcr0_exceptionbits_test mmcr0_cc56run_test mmcr0_pmccext_test \
+                  mmcr0_pmcjce_test
 
 top_srcdir = ../../../../../..
 include ../../../lib.mk

diff --git a/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcr0_pmcjce_test.c b/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcr0_pmcjce_test.c
new file mode 100644 (file)
index 0000000..fdd8ed9
--- /dev/null
+++ b/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcr0_pmcjce_test.c
@@ -0,0 +1,58 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright 2022, Athira Rajeev, IBM Corp.
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+
+#include "../event.h"
+#include "misc.h"
+#include "utils.h"
+
+extern void thirty_two_instruction_loop(int loops);
+
+/*
+ * A perf sampling test for mmcr0
+ * field: pmcjce
+ */
+static int mmcr0_pmcjce(void)
+{
+       struct event event;
+       u64 *intr_regs;
+
+       /* Check for platform support for the test */
+       SKIP_IF(check_pvr_for_sampling_tests());
+
+       /* Init the event for the sampling test */
+       event_init_sampling(&event, 0x500fa);
+       event.attr.sample_regs_intr = platform_extended_mask;
+       FAIL_IF(event_open(&event));
+       event.mmap_buffer = event_sample_buf_mmap(event.fd, 1);
+
+       FAIL_IF(event_enable(&event));
+
+       /* workload to make the event overflow */
+       thirty_two_instruction_loop(10000);
+
+       FAIL_IF(event_disable(&event));
+
+       /* Check for sample count */
+       FAIL_IF(!collect_samples(event.mmap_buffer));
+
+       intr_regs = get_intr_regs(&event, event.mmap_buffer);
+
+       /* Check for intr_regs */
+       FAIL_IF(!intr_regs);
+
+       /* Verify that pmcjce field is set in MMCR0 */
+       FAIL_IF(!get_mmcr0_pmcjce(get_reg_value(intr_regs, "MMCR0"), 5));
+
+       event_close(&event);
+       return 0;
+}
+
+int main(void)
+{
+       return test_harness(mmcr0_pmcjce, "mmcr0_pmcjce");
+}