[media] s5p-jpeg: Document sclk-jpeg clock for Exynos3250 SoC

JPEG IP on Exynos3250 SoC requires enabling two clock gates
for its operation. This patch documents this requirement.

Change-Id: If6670c5b841d5a4fc7a9e47db5a234fa60e1b92e
Signed-off-by: Jacek Anaszewski <j.anaszewski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>

diff --git a/Documentation/devicetree/bindings/media/exynos-jpeg-codec.txt b/Documentation/devicetree/bindings/media/exynos-jpeg-codec.txt
index 937b755..bf52ed4 100644 (file)
--- a/Documentation/devicetree/bindings/media/exynos-jpeg-codec.txt
+++ b/Documentation/devicetree/bindings/media/exynos-jpeg-codec.txt
@@ -3,9 +3,13 @@ Samsung S5P/EXYNOS SoC series JPEG codec
 Required properties:
 
 - compatible   : should be one of:
-                 "samsung,s5pv210-jpeg", "samsung,exynos4210-jpeg";
+                 "samsung,s5pv210-jpeg", "samsung,exynos4210-jpeg",
+                 "samsung,exynos3250-jpeg";
 - reg          : address and length of the JPEG codec IP register set;
 - interrupts   : specifies the JPEG codec IP interrupt;
-- clocks       : should contain the JPEG codec IP gate clock specifier, from the
-                 common clock bindings;
-- clock-names  : should contain "jpeg" entry.
+- clock-names   : should contain:
+                  - "jpeg" for the core gate clock,
+                  - "sclk" for the special clock (optional).
+- clocks       : should contain the clock specifier and clock ID list
+                 matching entries in the clock-names property; from
+                 the common clock bindings.