imx: imx6ul: kontron-sl-mx6ul: Sync devicetrees
authorFrieder Schrempf <frieder.schrempf@kontron.de>
Tue, 23 Aug 2022 14:29:15 +0000 (16:29 +0200)
committerStefano Babic <sbabic@denx.de>
Thu, 20 Oct 2022 15:35:51 +0000 (17:35 +0200)
Sync the devicetrees with Linux and adjust the board names.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
16 files changed:
arch/arm/dts/Makefile
arch/arm/dts/imx6ul-kontron-bl-43.dts [new file with mode: 0644]
arch/arm/dts/imx6ul-kontron-bl-common-u-boot.dtsi [moved from arch/arm/dts/imx6ul-kontron-n6x1x-s-u-boot.dtsi with 100% similarity]
arch/arm/dts/imx6ul-kontron-bl-common.dtsi [moved from arch/arm/dts/imx6ul-kontron-n6x1x-s.dtsi with 100% similarity]
arch/arm/dts/imx6ul-kontron-bl-u-boot.dtsi [moved from arch/arm/dts/imx6ul-kontron-n631x-s-u-boot.dtsi with 75% similarity]
arch/arm/dts/imx6ul-kontron-bl.dts [moved from arch/arm/dts/imx6ul-kontron-n631x-s.dts with 52% similarity]
arch/arm/dts/imx6ul-kontron-n6x1x-s.dts [deleted file]
arch/arm/dts/imx6ul-kontron-sl-common.dtsi [moved from arch/arm/dts/imx6ul-kontron-n6x1x-som-common.dtsi with 90% similarity]
arch/arm/dts/imx6ul-kontron-sl.dtsi [moved from arch/arm/dts/imx6ul-kontron-n631x-som.dtsi with 62% similarity]
arch/arm/dts/imx6ull-kontron-bl-u-boot.dtsi [moved from arch/arm/dts/imx6ull-kontron-n641x-s-u-boot.dtsi with 75% similarity]
arch/arm/dts/imx6ull-kontron-bl.dts [new file with mode: 0644]
arch/arm/dts/imx6ull-kontron-n641x-s.dts [deleted file]
arch/arm/dts/imx6ull-kontron-sl.dtsi [moved from arch/arm/dts/imx6ull-kontron-n641x-som.dtsi with 55% similarity]
board/kontron/sl-mx6ul/MAINTAINERS
board/kontron/sl-mx6ul/spl.c
configs/kontron-sl-mx6ul_defconfig

index 54bff65..8a577ac 100644 (file)
@@ -887,8 +887,8 @@ dtb-$(CONFIG_MX6UL) += \
        imx6ul-phytec-segin-ff-rdk-nand.dtb \
        imx6ul-pico-hobbit.dtb \
        imx6ul-pico-pi.dtb \
-       imx6ul-kontron-n631x-s.dtb \
-       imx6ull-kontron-n641x-s.dtb
+       imx6ul-kontron-bl.dtb \
+       imx6ull-kontron-bl.dtb
 
 dtb-$(CONFIG_MX6ULL) += \
        imx6ull-14x14-evk.dtb \
diff --git a/arch/arm/dts/imx6ul-kontron-bl-43.dts b/arch/arm/dts/imx6ul-kontron-bl-43.dts
new file mode 100644 (file)
index 0000000..0c64370
--- /dev/null
@@ -0,0 +1,103 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2017 exceet electronics GmbH
+ * Copyright (C) 2018 Kontron Electronics GmbH
+ * Copyright (c) 2019 Krzysztof Kozlowski <krzk@kernel.org>
+ */
+
+#include "imx6ul-kontron-bl.dts"
+
+/ {
+       model = "Kontron BL i.MX6UL 43 (N631X S 43)";
+       compatible = "kontron,bl-imx6ul-43", "kontron,bl-imx6ul",
+                    "kontron,sl-imx6ul", "fsl,imx6ul";
+
+       backlight {
+               compatible = "pwm-backlight";
+               pwms = <&pwm7 0 5000000>;
+               brightness-levels = <0 4 8 16 32 64 128 255>;
+               default-brightness-level = <6>;
+               status = "okay";
+       };
+};
+
+&i2c4 {
+       touchscreen@5d {
+               compatible = "goodix,gt928";
+               reg = <0x5d>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_cap_touch>;
+               interrupt-parent = <&gpio5>;
+               interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
+               reset-gpios = <&gpio5 8 GPIO_ACTIVE_HIGH>;
+               irq-gpios = <&gpio5 6 GPIO_ACTIVE_HIGH>;
+       };
+};
+
+&lcdif {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_lcdif_dat &pinctrl_lcdif_ctrl>;
+       /* Leave status disabled because of missing display panel node */
+};
+
+&pwm7 {
+       #pwm-cells = <2>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_pwm7>;
+       status = "okay";
+};
+
+&iomuxc {
+       pinctrl_cap_touch: captouchgrp {
+               fsl,pins = <
+                       MX6UL_PAD_SNVS_TAMPER6__GPIO5_IO06      0x1b0b0 /* Touch Interrupt */
+                       MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07      0x1b0b0 /* Touch Reset */
+                       MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08      0x1b0b0 /* Touch Wake */
+               >;
+       };
+
+       pinctrl_lcdif_ctrl: lcdifctrlgrp {
+               fsl,pins = <
+                       MX6UL_PAD_LCD_CLK__LCDIF_CLK            0x79
+                       MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE      0x79
+                       MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC        0x79
+                       MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC        0x79
+                       MX6UL_PAD_LCD_RESET__LCDIF_RESET        0x79
+               >;
+       };
+
+       pinctrl_lcdif_dat: lcdifdatgrp {
+               fsl,pins = <
+                       MX6UL_PAD_LCD_DATA00__LCDIF_DATA00      0x79
+                       MX6UL_PAD_LCD_DATA01__LCDIF_DATA01      0x79
+                       MX6UL_PAD_LCD_DATA02__LCDIF_DATA02      0x79
+                       MX6UL_PAD_LCD_DATA03__LCDIF_DATA03      0x79
+                       MX6UL_PAD_LCD_DATA04__LCDIF_DATA04      0x79
+                       MX6UL_PAD_LCD_DATA05__LCDIF_DATA05      0x79
+                       MX6UL_PAD_LCD_DATA06__LCDIF_DATA06      0x79
+                       MX6UL_PAD_LCD_DATA07__LCDIF_DATA07      0x79
+                       MX6UL_PAD_LCD_DATA08__LCDIF_DATA08      0x79
+                       MX6UL_PAD_LCD_DATA09__LCDIF_DATA09      0x79
+                       MX6UL_PAD_LCD_DATA10__LCDIF_DATA10      0x79
+                       MX6UL_PAD_LCD_DATA11__LCDIF_DATA11      0x79
+                       MX6UL_PAD_LCD_DATA12__LCDIF_DATA12      0x79
+                       MX6UL_PAD_LCD_DATA13__LCDIF_DATA13      0x79
+                       MX6UL_PAD_LCD_DATA14__LCDIF_DATA14      0x79
+                       MX6UL_PAD_LCD_DATA15__LCDIF_DATA15      0x79
+                       MX6UL_PAD_LCD_DATA16__LCDIF_DATA16      0x79
+                       MX6UL_PAD_LCD_DATA17__LCDIF_DATA17      0x79
+                       MX6UL_PAD_LCD_DATA18__LCDIF_DATA18      0x79
+                       MX6UL_PAD_LCD_DATA19__LCDIF_DATA19      0x79
+                       MX6UL_PAD_LCD_DATA20__LCDIF_DATA20      0x79
+                       MX6UL_PAD_LCD_DATA21__LCDIF_DATA21      0x79
+                       MX6UL_PAD_LCD_DATA22__LCDIF_DATA22      0x79
+                       MX6UL_PAD_LCD_DATA23__LCDIF_DATA23      0x79
+               >;
+       };
+
+       pinctrl_pwm7: pwm7grp {
+               fsl,pins = <
+                       MX6UL_PAD_CSI_VSYNC__PWM7_OUT           0x110b0
+               >;
+       };
+};
similarity index 75%
rename from arch/arm/dts/imx6ul-kontron-n631x-s-u-boot.dtsi
rename to arch/arm/dts/imx6ul-kontron-bl-u-boot.dtsi
index d3f013c..daf4175 100644 (file)
@@ -4,4 +4,4 @@
  * Copyright (C) 2018 Kontron Electronics GmbH
  */
 
-#include "imx6ul-kontron-n6x1x-s-u-boot.dtsi"
+#include "imx6ul-kontron-bl-common-u-boot.dtsi"
similarity index 52%
rename from arch/arm/dts/imx6ul-kontron-n631x-s.dts
rename to arch/arm/dts/imx6ul-kontron-bl.dts
index 407d2b1..dadf6d3 100644 (file)
@@ -7,11 +7,10 @@
 
 /dts-v1/;
 
-#include "imx6ul-kontron-n631x-som.dtsi"
-#include "imx6ul-kontron-n6x1x-s.dtsi"
+#include "imx6ul-kontron-sl.dtsi"
+#include "imx6ul-kontron-bl-common.dtsi"
 
 / {
-       model = "Kontron N631X S";
-       compatible = "kontron,imx6ul-n631x-s", "kontron,imx6ul-n631x-som",
-                    "fsl,imx6ul";
+       model = "Kontron BL i.MX6UL (N631X S)";
+       compatible = "kontron,bl-imx6ul", "kontron,sl-imx6ul", "fsl,imx6ul";
 };
diff --git a/arch/arm/dts/imx6ul-kontron-n6x1x-s.dts b/arch/arm/dts/imx6ul-kontron-n6x1x-s.dts
deleted file mode 100644 (file)
index 84d8a71..0000000
+++ /dev/null
@@ -1,423 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (C) 2017 exceet electronics GmbH
- * Copyright (C) 2018 Kontron Electronics GmbH
- * Copyright (c) 2019 Krzysztof Kozlowski <krzk@kernel.org>
- */
-
-/dts-v1/;
-
-#include <dt-bindings/gpio/gpio.h>
-#include "imx6ul-kontron-n6x1x-som.dtsi"
-
-/ {
-       gpio-leds {
-               compatible = "gpio-leds";
-               pinctrl-names = "default";
-               pinctrl-0 = <&pinctrl_gpio_leds>;
-
-               led1 {
-                       label = "debug-led1";
-                       gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
-                       default-state = "off";
-                       linux,default-trigger = "heartbeat";
-               };
-
-               led2 {
-                       label = "debug-led2";
-                       gpios = <&gpio5 3 GPIO_ACTIVE_LOW>;
-                       default-state = "off";
-               };
-
-               led3 {
-                       label = "debug-led3";
-                       gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
-                       default-state = "off";
-               };
-       };
-
-       pwm-beeper {
-               compatible = "pwm-beeper";
-               pwms = <&pwm8 0 5000>;
-       };
-
-       reg_3v3: regulator-3v3 {
-               compatible = "regulator-fixed";
-               regulator-name = "3v3";
-               regulator-min-microvolt = <3300000>;
-               regulator-max-microvolt = <3300000>;
-       };
-
-       reg_5v: regulator-5v {
-               compatible = "regulator-fixed";
-               regulator-name = "5v";
-               regulator-min-microvolt = <5000000>;
-               regulator-max-microvolt = <5000000>;
-       };
-
-       reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
-               compatible = "regulator-fixed";
-               regulator-name = "usb_otg1_vbus";
-               regulator-min-microvolt = <5000000>;
-               regulator-max-microvolt = <5000000>;
-               gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
-               enable-active-high;
-       };
-
-       reg_vref_adc: regulator-vref-adc {
-               compatible = "regulator-fixed";
-               regulator-name = "vref-adc";
-               regulator-min-microvolt = <3300000>;
-               regulator-max-microvolt = <3300000>;
-       };
-};
-
-&adc1 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_adc1>;
-       num-channels = <3>;
-       vref-supply = <&reg_vref_adc>;
-       status = "okay";
-};
-
-&can2 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_flexcan2>;
-       status = "okay";
-};
-
-&ecspi1 {
-       cs-gpios = <&gpio4 26 GPIO_ACTIVE_HIGH>;
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_ecspi1>;
-       status = "okay";
-
-       eeprom@0 {
-               compatible = "anvo,anv32e61w", "atmel,at25";
-               reg = <0>;
-               spi-max-frequency = <20000000>;
-               spi-cpha;
-               spi-cpol;
-               pagesize = <1>;
-               size = <8192>;
-               address-width = <16>;
-       };
-};
-
-&fec1 {
-       pinctrl-0 = <&pinctrl_enet1>;
-       /delete-node/ mdio;
-};
-
-&fec2 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_enet2 &pinctrl_enet2_mdio>;
-       phy-mode = "rmii";
-       phy-handle = <&ethphy2>;
-       status = "okay";
-
-       mdio {
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               ethphy1: ethernet-phy@1 {
-                       reg = <1>;
-                       micrel,led-mode = <0>;
-                       clocks = <&clks IMX6UL_CLK_ENET_REF>;
-                       clock-names = "rmii-ref";
-               };
-
-               ethphy2: ethernet-phy@2 {
-                       reg = <2>;
-                       micrel,led-mode = <0>;
-                       clocks = <&clks IMX6UL_CLK_ENET2_REF>;
-                       clock-names = "rmii-ref";
-               };
-       };
-};
-
-&i2c1 {
-       clock-frequency = <100000>;
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_i2c1>;
-       status = "okay";
-};
-
-&i2c4 {
-       clock-frequency = <100000>;
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_i2c4>;
-       status = "okay";
-
-       rtc@32 {
-               compatible = "epson,rx8900";
-               reg = <0x32>;
-       };
-};
-
-&pwm8 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_pwm8>;
-       status = "okay";
-};
-
-&uart1 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_uart1>;
-       status = "okay";
-};
-
-&uart2 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_uart2>;
-       linux,rs485-enabled-at-boot-time;
-       rs485-rx-during-tx;
-       rs485-rts-active-low;
-       uart-has-rtscts;
-       status = "okay";
-};
-
-&uart3 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_uart3>;
-       fsl,uart-has-rtscts;
-       status = "okay";
-};
-
-&uart4 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_uart4>;
-       status = "okay";
-};
-
-&usbotg1 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_usbotg1>;
-       dr_mode = "otg";
-       srp-disable;
-       hnp-disable;
-       adp-disable;
-       over-current-active-low;
-       vbus-supply = <&reg_usb_otg1_vbus>;
-       status = "okay";
-};
-
-&usbotg2 {
-       dr_mode = "host";
-       disable-over-current;
-       vbus-supply = <&reg_5v>;
-       status = "okay";
-};
-
-&usdhc1 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_usdhc1>;
-       cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
-       keep-power-in-suspend;
-       wakeup-source;
-       vmmc-supply = <&reg_3v3>;
-       voltage-ranges = <3300 3300>;
-       bus-width = <4>;
-       no-1-8-v;
-       status = "okay";
-};
-
-&usdhc2 {
-       pinctrl-names = "default", "state_100mhz", "state_200mhz";
-       pinctrl-0 = <&pinctrl_usdhc2>;
-       pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
-       pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
-       non-removable;
-       keep-power-in-suspend;
-       wakeup-source;
-       vmmc-supply = <&reg_3v3>;
-       voltage-ranges = <3300 3300>;
-       bus-width = <4>;
-       no-1-8-v;
-       status = "okay";
-};
-
-&wdog1 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_wdog>;
-       fsl,ext-reset-output;
-       status = "okay";
-};
-
-&iomuxc {
-       pinctrl-0 = <&pinctrl_reset_out &pinctrl_gpio>;
-
-       pinctrl_adc1: adc1grp {
-               fsl,pins = <
-                       MX6UL_PAD_GPIO1_IO02__GPIO1_IO02        0xb0
-                       MX6UL_PAD_GPIO1_IO03__GPIO1_IO03        0xb0
-                       MX6UL_PAD_GPIO1_IO08__GPIO1_IO08        0xb0
-               >;
-       };
-
-       pinctrl_ecspi1: ecspi1grp {
-               fsl,pins = <
-                       MX6UL_PAD_CSI_DATA07__ECSPI1_MISO       0x100b1
-                       MX6UL_PAD_CSI_DATA06__ECSPI1_MOSI       0x100b1
-                       MX6UL_PAD_CSI_DATA04__ECSPI1_SCLK       0x100b1
-                       MX6UL_PAD_CSI_DATA05__GPIO4_IO26        0x100b1 /* ECSPI1-CS1 */
-               >;
-       };
-
-       pinctrl_enet2: enet2grp {
-               fsl,pins = <
-                       MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN      0x1b0b0
-                       MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER      0x1b0b0
-                       MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
-                       MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
-                       MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN      0x1b0b0
-                       MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
-                       MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
-                       MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2  0x4001b009
-               >;
-       };
-
-       pinctrl_enet2_mdio: enet2mdiogrp {
-               fsl,pins = <
-                       MX6UL_PAD_GPIO1_IO07__ENET2_MDC         0x1b0b0
-                       MX6UL_PAD_GPIO1_IO06__ENET2_MDIO        0x1b0b0
-               >;
-       };
-
-       pinctrl_flexcan2: flexcan2grp{
-               fsl,pins = <
-                       MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX      0x1b020
-                       MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX      0x1b020
-               >;
-       };
-
-       pinctrl_gpio: gpiogrp {
-               fsl,pins = <
-                       MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05      0x1b0b0 /* DOUT1 */
-                       MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04      0x1b0b0 /* DIN1 */
-                       MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01      0x1b0b0 /* DOUT2 */
-                       MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00      0x1b0b0 /* DIN2 */
-               >;
-       };
-
-       pinctrl_gpio_leds: gpioledsgrp {
-               fsl,pins = <
-                       MX6UL_PAD_UART5_TX_DATA__GPIO1_IO30     0x1b0b0 /* LED H14 */
-                       MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03      0x1b0b0 /* LED H15 */
-                       MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02      0x1b0b0 /* LED H16 */
-               >;
-       };
-
-       pinctrl_i2c1: i2c1grp {
-               fsl,pins = <
-                       MX6UL_PAD_CSI_PIXCLK__I2C1_SCL          0x4001b8b0
-                       MX6UL_PAD_CSI_MCLK__I2C1_SDA            0x4001b8b0
-               >;
-       };
-
-       pinctrl_i2c4: i2c4grp {
-               fsl,pins = <
-                       MX6UL_PAD_UART2_TX_DATA__I2C4_SCL       0x4001f8b0
-                       MX6UL_PAD_UART2_RX_DATA__I2C4_SDA       0x4001f8b0
-               >;
-       };
-
-       pinctrl_pwm8: pwm8grp {
-               fsl,pins = <
-                       MX6UL_PAD_CSI_HSYNC__PWM8_OUT           0x110b0
-               >;
-       };
-
-       pinctrl_uart1: uart1grp {
-               fsl,pins = <
-                       MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX   0x1b0b1
-                       MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX   0x1b0b1
-               >;
-       };
-
-       pinctrl_uart2: uart2grp {
-               fsl,pins = <
-                       MX6UL_PAD_NAND_DATA04__UART2_DCE_TX     0x1b0b1
-                       MX6UL_PAD_NAND_DATA05__UART2_DCE_RX     0x1b0b1
-                       MX6UL_PAD_NAND_DATA06__UART2_DCE_CTS    0x1b0b1
-                       /*
-                        * mux unused RTS to make sure it doesn't cause
-                        * any interrupts when it is undefined
-                        */
-                       MX6UL_PAD_NAND_DATA07__UART2_DCE_RTS    0x1b0b1
-               >;
-       };
-
-       pinctrl_uart3: uart3grp {
-               fsl,pins = <
-                       MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX   0x1b0b1
-                       MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX   0x1b0b1
-                       MX6UL_PAD_UART3_CTS_B__UART3_DCE_CTS    0x1b0b1
-                       MX6UL_PAD_UART3_RTS_B__UART3_DCE_RTS    0x1b0b1
-               >;
-       };
-
-       pinctrl_uart4: uart4grp {
-               fsl,pins = <
-                       MX6UL_PAD_UART4_TX_DATA__UART4_DCE_TX   0x1b0b1
-                       MX6UL_PAD_UART4_RX_DATA__UART4_DCE_RX   0x1b0b1
-               >;
-       };
-
-       pinctrl_usbotg1: usbotg1 {
-               fsl,pins = <
-                       MX6UL_PAD_GPIO1_IO04__GPIO1_IO04        0x1b0b0
-               >;
-       };
-
-       pinctrl_usdhc1: usdhc1grp {
-               fsl,pins = <
-                       MX6UL_PAD_SD1_CMD__USDHC1_CMD           0x17059
-                       MX6UL_PAD_SD1_CLK__USDHC1_CLK           0x10059
-                       MX6UL_PAD_SD1_DATA0__USDHC1_DATA0       0x17059
-                       MX6UL_PAD_SD1_DATA1__USDHC1_DATA1       0x17059
-                       MX6UL_PAD_SD1_DATA2__USDHC1_DATA2       0x17059
-                       MX6UL_PAD_SD1_DATA3__USDHC1_DATA3       0x17059
-                       MX6UL_PAD_UART1_RTS_B__GPIO1_IO19       0x100b1 /* SD1_CD */
-               >;
-       };
-
-       pinctrl_usdhc2: usdhc2grp {
-               fsl,pins = <
-                       MX6UL_PAD_NAND_RE_B__USDHC2_CLK         0x10059
-                       MX6UL_PAD_NAND_WE_B__USDHC2_CMD         0x17059
-                       MX6UL_PAD_NAND_DATA00__USDHC2_DATA0     0x17059
-                       MX6UL_PAD_NAND_DATA01__USDHC2_DATA1     0x17059
-                       MX6UL_PAD_NAND_DATA02__USDHC2_DATA2     0x17059
-                       MX6UL_PAD_NAND_DATA03__USDHC2_DATA3     0x17059
-               >;
-       };
-
-       pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
-               fsl,pins = <
-                       MX6UL_PAD_NAND_RE_B__USDHC2_CLK         0x100b9
-                       MX6UL_PAD_NAND_WE_B__USDHC2_CMD         0x170b9
-                       MX6UL_PAD_NAND_DATA00__USDHC2_DATA0     0x170b9
-                       MX6UL_PAD_NAND_DATA01__USDHC2_DATA1     0x170b9
-                       MX6UL_PAD_NAND_DATA02__USDHC2_DATA2     0x170b9
-                       MX6UL_PAD_NAND_DATA03__USDHC2_DATA3     0x170b9
-               >;
-       };
-
-       pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
-               fsl,pins = <
-                       MX6UL_PAD_NAND_RE_B__USDHC2_CLK         0x100f9
-                       MX6UL_PAD_NAND_WE_B__USDHC2_CMD         0x170f9
-                       MX6UL_PAD_NAND_DATA00__USDHC2_DATA0     0x170f9
-                       MX6UL_PAD_NAND_DATA01__USDHC2_DATA1     0x170f9
-                       MX6UL_PAD_NAND_DATA02__USDHC2_DATA2     0x170f9
-                       MX6UL_PAD_NAND_DATA03__USDHC2_DATA3     0x170f9
-               >;
-       };
-
-       pinctrl_wdog: wdoggrp {
-               fsl,pins = <
-                       MX6UL_PAD_GPIO1_IO09__WDOG1_WDOG_ANY    0x30b0
-               >;
-       };
-};
        chosen {
                stdout-path = &uart4;
        };
+
+       memory@80000000 {
+               reg = <0x80000000 0x10000000>;
+               device_type = "memory";
+       };
 };
 
 &ecspi2 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_qspi>;
        status = "okay";
+
+       spi-flash@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "spi-nand";
+               spi-max-frequency = <104000000>;
+               spi-tx-bus-width = <4>;
+               spi-rx-bus-width = <4>;
+               reg = <0>;
+       };
 };
 
 &wdog1 {
similarity index 62%
rename from arch/arm/dts/imx6ul-kontron-n631x-som.dtsi
rename to arch/arm/dts/imx6ul-kontron-sl.dtsi
index 9a11798..0580d04 100644 (file)
@@ -6,9 +6,9 @@
  */
 
 #include "imx6ul.dtsi"
-#include "imx6ul-kontron-n6x1x-som-common.dtsi"
+#include "imx6ul-kontron-sl-common.dtsi"
 
 / {
-       model = "Kontron N631X SOM";
-       compatible = "kontron,imx6ul-n631x-som", "fsl,imx6ul";
+       model = "Kontron SL i.MX6UL (N631X SOM)";
+       compatible = "kontron,sl-imx6ul", "fsl,imx6ul";
 };
@@ -4,4 +4,4 @@
  * Copyright (C) 2018 Kontron Electronics GmbH
  */
 
-#include "imx6ul-kontron-n6x1x-s-u-boot.dtsi"
+#include "imx6ul-kontron-bl-common-u-boot.dtsi"
diff --git a/arch/arm/dts/imx6ull-kontron-bl.dts b/arch/arm/dts/imx6ull-kontron-bl.dts
new file mode 100644 (file)
index 0000000..fa01646
--- /dev/null
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2017 exceet electronics GmbH
+ * Copyright (C) 2019 Kontron Electronics GmbH
+ */
+
+/dts-v1/;
+
+#include "imx6ull-kontron-sl.dtsi"
+#include "imx6ul-kontron-bl-common.dtsi"
+
+/ {
+       model = "Kontron BL i.MX6ULL (N641X S)";
+       compatible = "kontron,bl-imx6ull", "kontron,sl-imx6ull", "fsl,imx6ull";
+};
diff --git a/arch/arm/dts/imx6ull-kontron-n641x-s.dts b/arch/arm/dts/imx6ull-kontron-n641x-s.dts
deleted file mode 100644 (file)
index 01aeea4..0000000
+++ /dev/null
@@ -1,16 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (C) 2017 exceet electronics GmbH
- * Copyright (C) 2019 Kontron Electronics GmbH
- */
-
-/dts-v1/;
-
-#include "imx6ull-kontron-n641x-som.dtsi"
-#include "imx6ul-kontron-n6x1x-s.dtsi"
-
-/ {
-       model = "Kontron N641X S";
-       compatible = "kontron,imx6ull-n641x-s", "kontron,imx6ull-n641x-som",
-                    "fsl,imx6ull";
-};
similarity index 55%
rename from arch/arm/dts/imx6ull-kontron-n641x-som.dtsi
rename to arch/arm/dts/imx6ull-kontron-sl.dtsi
index 8a64aa9..93f10eb 100644 (file)
@@ -5,9 +5,9 @@
  */
 
 #include "imx6ull.dtsi"
-#include "imx6ul-kontron-n6x1x-som-common.dtsi"
+#include "imx6ul-kontron-sl-common.dtsi"
 
 / {
-       model = "Kontron N641X SOM";
-       compatible = "kontron,imx6ull-n641x-som", "fsl,imx6ull";
+       model = "Kontron SL i.MX6ULL (N641X SOM)";
+       compatible = "kontron,sl-imx6ull", "fsl,imx6ull";
 };
index 0f8b551..9e9dff0 100644 (file)
@@ -1,8 +1,10 @@
 Kontron SL/BL i.MX6UL/ULL Boards (N63xx/N64xx)
 M:     Frieder Schrempf <frieder.schrempf@kontron.de>
 S:     Maintained
-F:     arch/arm/dts/imx6ul-kontron-n6*
-F:     arch/arm/dts/imx6ull-kontron-n6*
+F:     arch/arm/dts/imx6ul-kontron-sl*
+F:     arch/arm/dts/imx6ul-kontron-bl*
+F:     arch/arm/dts/imx6ull-kontron-sl*
+F:     arch/arm/dts/imx6ull-kontron-bl*
 F:     board/kontron/sl-mx6ul
 F:     configs/kontron-sl-mx6ul_defconfig
 F:     doc/board/kontron/sl-mx6ul.rst
index ba6915c..3ae8bf6 100644 (file)
@@ -22,8 +22,8 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 enum {
-       BOARD_TYPE_KTN_N631X = 1,
-       BOARD_TYPE_KTN_N641X,
+       BOARD_TYPE_KTN_SL_UL = 1,
+       BOARD_TYPE_KTN_SL_ULL,
        BOARD_TYPE_MAX
 };
 
@@ -295,9 +295,9 @@ static void spl_dram_init(void)
 static int do_board_detect(void)
 {
        if (is_mx6ul())
-               gd->board_type = BOARD_TYPE_KTN_N631X;
+               gd->board_type = BOARD_TYPE_KTN_SL_UL;
        else if (is_mx6ull())
-               gd->board_type = BOARD_TYPE_KTN_N641X;
+               gd->board_type = BOARD_TYPE_KTN_SL_ULL;
 
        printf("Kontron SL i.MX6UL%s (N6%s1x) module, %lu MB RAM detected\n",
               is_mx6ull() ? "L" : "", is_mx6ull() ? "4" : "3", gd->ram_size / SZ_1M);
@@ -370,12 +370,12 @@ int board_early_init_f(void)
 
 int board_fit_config_name_match(const char *name)
 {
-       if (gd->board_type == BOARD_TYPE_KTN_N631X && is_mx6ul() &&
-           !strcmp(name, "imx6ul-kontron-n631x-s"))
+       if (gd->board_type == BOARD_TYPE_KTN_SL_UL && is_mx6ul() &&
+           (!strcmp(name, "imx6ul-kontron-n631x-s") || !strcmp(name, "imx6ul-kontron-bl")))
                return 0;
 
-       if (gd->board_type == BOARD_TYPE_KTN_N641X && is_mx6ull() &&
-           !strcmp(name, "imx6ull-kontron-n641x-s"))
+       if (gd->board_type == BOARD_TYPE_KTN_SL_ULL && is_mx6ull() &&
+           (!strcmp(name, "imx6ull-kontron-n641x-s") || !strcmp(name, "imx6ull-kontron-bl")))
                return 0;
 
        return -1;
index 0cdca7e..aa789fc 100644 (file)
@@ -12,7 +12,7 @@ CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_MX6UL=y
 CONFIG_TARGET_KONTRON_MX6UL=y
 CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="imx6ul-kontron-n631x-s"
+CONFIG_DEFAULT_DEVICE_TREE="imx6ul-kontron-bl"
 CONFIG_SPL_TEXT_BASE=0x00908000
 CONFIG_SPL_MMC=y
 CONFIG_SPL_SERIAL=y
@@ -60,7 +60,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=spi1.0:128k(spl),832k(u-boot),64k(env);spi4.0:
 CONFIG_CMD_UBI=y
 CONFIG_OF_CONTROL=y
 CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_LIST="imx6ul-kontron-n631x-s imx6ull-kontron-n641x-s"
+CONFIG_OF_LIST="imx6ul-kontron-bl imx6ull-kontron-bl"
 CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y