[Hexagon] Move testcase from c1873631d0a8f2acc to proper location

diff --git a/llvm/test/MC/Hexagon/PacketRules/restrict_slot1_aok.s b/llvm/test/MC/Hexagon/PacketRules/restrict_slot1_aok.s
new file mode 100644 (file)
index 0000000..669c43c
--- /dev/null
+++ b/llvm/test/MC/Hexagon/PacketRules/restrict_slot1_aok.s
@@ -0,0 +1,9 @@
+# RUN: not llvm-mc -arch=hexagon -filetype=asm %s 2>&1 | FileCheck %s
+
+{ r0=sub(#1,r0)
+  r1=sub(#1, r0)
+  r2=memw(r0)
+  dczeroa(r0) }
+# CHECK: 5:3: note: Instruction was restricted from being in slot 1
+# CHECK: 6:3: note: Instruction can only be combined with an ALU instruction in slot 1
+# CHECK: 6:15: error: invalid instruction packet: slot error

diff --git a/test/MC/Hexagon/PacketRules/restrict_slot1_aok.s b/test/MC/Hexagon/PacketRules/restrict_slot1_aok.s
deleted file mode 100644 (file)
index 97b4d56..0000000
--- a/test/MC/Hexagon/PacketRules/restrict_slot1_aok.s
+++ /dev/null
@@ -1,9 +0,0 @@
-# RUN: not llvm-mc -filetype=asm %s 2>&1 | FileCheck %s
-
-{ r0=sub(#1,r0)
-  r1=sub(#1, r0)
-  r2=memw(r0)
-  dczeroa(r0) }
-# CHECK: 5:3: note: Instruction was restricted from being in slot 1
-# CHECK: 6:3: note: Instruction can only be combined with an ALU instruction in slot 1
-# CHECK: 6:15: error: invalid instruction packet: slot error