ath9k: Check the return value of pcie_capability_read_*()
authorBolarinwa Olayemi Saheed <refactormyself@gmail.com>
Mon, 13 Jul 2020 17:55:26 +0000 (19:55 +0200)
committerKalle Valo <kvalo@codeaurora.org>
Mon, 20 Jul 2020 17:09:36 +0000 (20:09 +0300)
On failure pcie_capability_read_dword() sets it's last parameter, val
to 0. However, with Patch 14/14, it is possible that val is set to ~0 on
failure. This would introduce a bug because (x & x) == (~0 & x).

This bug can be avoided without changing the function's behaviour if the
return value of pcie_capability_read_dword is checked to confirm success.

Check the return value of pcie_capability_read_dword() to ensure success.

Suggested-by: Bjorn Helgaas <bjorn@helgaas.com>
Signed-off-by: Bolarinwa Olayemi Saheed <refactormyself@gmail.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Link: https://lore.kernel.org/r/20200713175529.29715-2-refactormyself@gmail.com
drivers/net/wireless/ath/ath9k/pci.c

index f3461b1..cff9af3 100644 (file)
@@ -825,6 +825,7 @@ static void ath_pci_aspm_init(struct ath_common *common)
        struct pci_dev *pdev = to_pci_dev(sc->dev);
        struct pci_dev *parent;
        u16 aspm;
+       int ret;
 
        if (!ah->is_pciexpress)
                return;
@@ -866,8 +867,8 @@ static void ath_pci_aspm_init(struct ath_common *common)
        if (AR_SREV_9462(ah))
                pci_read_config_dword(pdev, 0x70c, &ah->config.aspm_l1_fix);
 
-       pcie_capability_read_word(parent, PCI_EXP_LNKCTL, &aspm);
-       if (aspm & (PCI_EXP_LNKCTL_ASPM_L0S | PCI_EXP_LNKCTL_ASPM_L1)) {
+       ret = pcie_capability_read_word(parent, PCI_EXP_LNKCTL, &aspm);
+       if (!ret && (aspm & (PCI_EXP_LNKCTL_ASPM_L0S | PCI_EXP_LNKCTL_ASPM_L1))) {
                ah->aspm_enabled = true;
                /* Initialize PCIe PM and SERDES registers. */
                ath9k_hw_configpcipowersave(ah, false);