ge2d: merge ge2d from amlogic-3.14-dev [3/3]
authorJian Cao <jian.cao@amlogic.com>
Fri, 25 Jan 2019 09:16:05 +0000 (17:16 +0800)
committerJianxin Pan <jianxin.pan@amlogic.com>
Wed, 30 Jan 2019 08:48:33 +0000 (00:48 -0800)
PD#SWPL-4355

Problem:
ge2d: Adjust scaler para when input is nv21 and output is rgb

Solution:
merge patch 'Adjust scaler para when input is nv21 and output is rgb'
from amlogic-3.14-dev(PD#15652)

Verify:
verified on u200

Change-Id: I199b07d683a01175ec17d4d34be6febd3083920c
Signed-off-by: pengcheng chen <pengcheng.chen@amlogic.com>
Signed-off-by: Jian Cao <jian.cao@amlogic.com>
drivers/amlogic/media/common/ge2d/ge2d_hw.c
drivers/amlogic/media/common/ge2d/ge2d_wq.c
include/linux/amlogic/media/ge2d/ge2d.h

index 079779d..a9eaba3 100644 (file)
@@ -798,6 +798,32 @@ void ge2d_set_cmd(struct ge2d_cmd_s *cfg)
        x_yc_ratio = ge2d_reg_get_bits(GE2D_GEN_CTRL0, 11, 1);
        y_yc_ratio = ge2d_reg_get_bits(GE2D_GEN_CTRL0, 10, 1);
 
+       /* src:yuv , dst: rgb */
+       if ((cfg->src1_fmt & GE2D_FORMAT_YUV) &&
+               ((cfg->dst_fmt & GE2D_FORMAT_YUV) == 0)) {
+               if (x_yc_ratio) {
+                       if ((cfg->src1_x_rev + cfg->dst_x_rev) == 1) {
+                               x_extra_bit_start = 3;
+                               x_extra_bit_end   = 2;
+                               x_chr_phase = 0x4c;
+                       } else {
+                               x_extra_bit_start = 2;
+                               x_extra_bit_end   = 3;
+                               x_chr_phase = 0xc4;
+                       }
+               }
+               if (y_yc_ratio) {
+                       if ((cfg->src1_y_rev + cfg->dst_y_rev) == 1) {
+                               y_extra_bit_start = 3;
+                               y_extra_bit_end   = 2;
+                               y_chr_phase = 0x4c;
+                       } else {
+                               y_extra_bit_start = 2;
+                               y_extra_bit_end   = 3;
+                               y_chr_phase = 0xc4;
+                       }
+               }
+       } else {
                if (x_yc_ratio) {
                        if ((cfg->src1_x_rev + cfg->dst_x_rev) == 1) {
                                x_extra_bit_start = 3;
@@ -820,8 +846,8 @@ void ge2d_set_cmd(struct ge2d_cmd_s *cfg)
                                y_extra_bit_end   = 3;
                                y_chr_phase = 0x4c;
                        }
+               }
        }
-
        ge2d_reg_write(GE2D_SRC1_X_START_END,
                        (x_extra_bit_start << 30) |  /* x start extra */
                        ((cfg->src1_x_start & 0x3fff) << 16) |
index 66ce8a1..7084a14 100644 (file)
@@ -1928,6 +1928,11 @@ int ge2d_context_config_ex_ion(struct ge2d_context_s *context,
        ge2d_cmd_cfg->hsc_rpt_p0_num = ge2d_config->hf_rpt_num;
        ge2d_cmd_cfg->src1_cmult_asel = ge2d_config->src1_cmult_asel;
        ge2d_cmd_cfg->src2_cmult_asel = ge2d_config->src2_cmult_asel;
+
+       ge2d_cmd_cfg->src1_fmt = ge2d_config->src_para.format;
+       ge2d_cmd_cfg->src2_fmt = ge2d_config->src2_para.format;
+       ge2d_cmd_cfg->dst_fmt = ge2d_config->dst_para.format;
+
        context->config.update_flag = UPDATE_ALL;
        /* context->config.src1_data.ddr_burst_size_y = 3; */
        /* context->config.src1_data.ddr_burst_size_cb = 3; */
index cdcf0de..0ba9bd3 100644 (file)
@@ -548,6 +548,7 @@ struct ge2d_cmd_s {
        /* unsigned char    src1_x_chr_phase; */
        /* unsigned char    src1_y_chr_phase; */
        unsigned char    src1_fill_color_en;
+       unsigned int     src1_fmt;
 
        int              src2_x_start;
        int              src2_y_start;
@@ -556,6 +557,7 @@ struct ge2d_cmd_s {
        unsigned char    src2_x_rev;
        unsigned char    src2_y_rev;
        unsigned char    src2_fill_color_en;
+       unsigned int     src2_fmt;
 
        int              dst_x_start;
        int              dst_y_start;
@@ -564,6 +566,7 @@ struct ge2d_cmd_s {
        unsigned char    dst_xy_swap;
        unsigned char    dst_x_rev;
        unsigned char    dst_y_rev;
+       unsigned int     dst_fmt;
 
        int              sc_prehsc_en;
        int              sc_prevsc_en;