drm/amd/display: Disable TBT3 DSC work around by default.

[Why]
Some TBT3 docks have DPOAs which report USB4 capability and are expected
to support USB4 DPOA features such as FEC/DSC.

[How]
By default, do not override FEC/DSC capabilities reported by TBT3 docks.

Reviewed-by: Meenakshikumar Somasundaram <Meenakshikumar.Somasundaram@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Jimmy Kizito <Jimmy.Kizito@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
index e0660e7356c9d44c2d496be99329d8ace910b500..07e5b316fbde548dad2e48f8d114a2a12e0834ca 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
@@ -5553,7 +5553,7 @@ static bool retrieve_link_cap(struct dc_link *link)
                 * only if required.
                 */
                if (link->ep_type == DISPLAY_ENDPOINT_USB4_DPIA &&
-                               !link->dc->debug.dpia_debug.bits.disable_force_tbt3_work_around &&
+                               link->dc->debug.dpia_debug.bits.enable_force_tbt3_work_around &&
                                link->dpcd_caps.is_branch_dev &&
                                link->dpcd_caps.branch_dev_id == DP_BRANCH_DEVICE_ID_90CC24 &&
                                link->dpcd_caps.branch_hw_revision == DP_BRANCH_HW_REV_10 &&

diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index 30379e5ff898ba8ce1a6dbc6b65a1aa393202396..337bbd4c66429ce50e38831bfad6e40b0e1b87ea 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -542,7 +542,7 @@ union dpia_debug_options {
                uint32_t force_non_lttpr:1; /* bit 1 */
                uint32_t extend_aux_rd_interval:1; /* bit 2 */
                uint32_t disable_mst_dsc_work_around:1; /* bit 3 */
-               uint32_t disable_force_tbt3_work_around:1; /* bit 4 */
+               uint32_t enable_force_tbt3_work_around:1; /* bit 4 */
                uint32_t reserved:27;
        } bits;
        uint32_t raw;