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ARM: dts: r9a06g032: Add the USBF controller node
author
Herve Codina
<herve.codina@bootlin.com>
Thu, 5 Jan 2023 15:22:56 +0000
(16:22 +0100)
committer
Geert Uytterhoeven
<geert+renesas@glider.be>
Thu, 26 Jan 2023 15:03:04 +0000
(16:03 +0100)
Add the USBF controller available in the r9a06g032 SoC.
Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link:
https://lore.kernel.org/r/20230105152257.310642-5-herve.codina@bootlin.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/arm/boot/dts/r9a06g032.dtsi
patch
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diff --git
a/arch/arm/boot/dts/r9a06g032.dtsi
b/arch/arm/boot/dts/r9a06g032.dtsi
index
41e19c0
..
0fa565a
100644
(file)
--- a/
arch/arm/boot/dts/r9a06g032.dtsi
+++ b/
arch/arm/boot/dts/r9a06g032.dtsi
@@
-117,6
+117,18
@@
};
};
+ udc: usb@4001e000 {
+ compatible = "renesas,r9a06g032-usbf", "renesas,rzn1-usbf";
+ reg = <0x4001e000 0x2000>;
+ interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&sysctrl R9A06G032_HCLK_USBF>,
+ <&sysctrl R9A06G032_HCLK_USBPM>;
+ clock-names = "hclkf", "hclkpm";
+ power-domains = <&sysctrl>;
+ status = "disabled";
+ };
+
pci_usb: pci@40030000 {
compatible = "renesas,pci-r9a06g032", "renesas,pci-rzn1";
device_type = "pci";