arm: socfpga: Move Stratix10 and Agilex to use TARGET_SOCFPGA_SOC64

Create common macro TARGET_SOCFPGA_SOC64 for Stratix10 and Agilex.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index d51abbe..3307f2b 100644 (file)
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -970,7 +970,7 @@ config ARCH_SOCFPGA
        bool "Altera SOCFPGA family"
        select ARCH_EARLY_INIT_R
        select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
-       select ARM64 if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
+       select ARM64 if TARGET_SOCFPGA_SOC64
        select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
        select DM
        select DM_SERIAL
@@ -982,7 +982,7 @@ config ARCH_SOCFPGA
        select SPL_LIBGENERIC_SUPPORT
        select SPL_NAND_SUPPORT if SPL_NAND_DENALI
        select SPL_OF_CONTROL
-       select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
+       select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
        select SPL_SERIAL_SUPPORT
        select SPL_SYSRESET
        select SPL_WATCHDOG_SUPPORT
@@ -991,7 +991,7 @@ config ARCH_SOCFPGA
        select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
        select SYSRESET
        select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
-       select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
+       select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
        imply CMD_DM
        imply CMD_MTDPARTS
        imply CRC32_VERIFY

diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
index 4d4ff16..9b1abda 100644 (file)
--- a/arch/arm/mach-socfpga/Kconfig
+++ b/arch/arm/mach-socfpga/Kconfig
@@ -38,6 +38,7 @@ config TARGET_SOCFPGA_AGILEX
        select FPGA_INTEL_SDM_MAILBOX
        select NCORE_CACHE
        select SPL_CLK if SPL
+       select TARGET_SOCFPGA_SOC64
 
 config TARGET_SOCFPGA_ARRIA5
        bool
@@ -75,12 +76,16 @@ config TARGET_SOCFPGA_GEN5
        imply SPL_SYS_MALLOC_SIMPLE
        imply SPL_USE_TINY_PRINTF
 
+config TARGET_SOCFPGA_SOC64
+       bool
+
 config TARGET_SOCFPGA_STRATIX10
        bool
        select ARMV8_MULTIENTRY
        select ARMV8_SET_SMPEN
        select BINMAN if SPL_ATF
        select FPGA_INTEL_SDM_MAILBOX
+       select TARGET_SOCFPGA_SOC64
 
 choice
        prompt "Altera SOCFPGA board select"

diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager.h b/arch/arm/mach-socfpga/include/mach/reset_manager.h
index 7844ad1..8c25325 100644 (file)
--- a/arch/arm/mach-socfpga/include/mach/reset_manager.h
+++ b/arch/arm/mach-socfpga/include/mach/reset_manager.h
@@ -43,8 +43,7 @@ void socfpga_per_reset_all(void);
 #include <asm/arch/reset_manager_gen5.h>
 #elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
 #include <asm/arch/reset_manager_arria10.h>
-#elif defined(CONFIG_TARGET_SOCFPGA_STRATIX10) || \
-       defined(CONFIG_TARGET_SOCFPGA_AGILEX)
+#elif defined(CONFIG_TARGET_SOCFPGA_SOC64)
 #include <asm/arch/reset_manager_soc64.h>
 #endif
 

diff --git a/arch/arm/mach-socfpga/include/mach/system_manager.h b/arch/arm/mach-socfpga/include/mach/system_manager.h
index f816954..5603eaa 100644 (file)
--- a/arch/arm/mach-socfpga/include/mach/system_manager.h
+++ b/arch/arm/mach-socfpga/include/mach/system_manager.h
@@ -8,8 +8,7 @@
 
 phys_addr_t socfpga_get_sysmgr_addr(void);
 
-#if defined(CONFIG_TARGET_SOCFPGA_STRATIX10) || \
-       defined(CONFIG_TARGET_SOCFPGA_AGILEX)
+#if defined(CONFIG_TARGET_SOCFPGA_SOC64)
 #include <asm/arch/system_manager_soc64.h>
 #else
 #define SYSMGR_ROMCODEGRP_CTRL_WARMRSTCFGPINMUX        BIT(0)

diff --git a/drivers/ddr/altera/Kconfig b/drivers/ddr/altera/Kconfig
index 8f590dc..4660d20 100644 (file)
--- a/drivers/ddr/altera/Kconfig
+++ b/drivers/ddr/altera/Kconfig
@@ -1,8 +1,8 @@
 config SPL_ALTERA_SDRAM
        bool "SoCFPGA DDR SDRAM driver in SPL"
        depends on SPL
-       depends on TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 || TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
-       select RAM if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
-       select SPL_RAM if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
+       depends on TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 || TARGET_SOCFPGA_SOC64
+       select RAM if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_SOC64
+       select SPL_RAM if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_SOC64
        help
          Enable DDR SDRAM controller for the SoCFPGA devices.

diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index 425b52a..dc0b3dd 100644 (file)
--- a/drivers/fpga/Kconfig
+++ b/drivers/fpga/Kconfig
@@ -33,7 +33,7 @@ config FPGA_CYCLON2
 
 config FPGA_INTEL_SDM_MAILBOX
        bool "Enable Intel FPGA Full Reconfiguration SDM Mailbox driver"
-       depends on TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
+       depends on TARGET_SOCFPGA_SOC64
        select FPGA_ALTERA
        help
          Say Y here to enable the Intel FPGA Full Reconfig SDM Mailbox driver

diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig
index 968dfa4..ac77ffb 100644 (file)
--- a/drivers/sysreset/Kconfig
+++ b/drivers/sysreset/Kconfig
@@ -94,7 +94,7 @@ config SYSRESET_SOCFPGA
 
 config SYSRESET_SOCFPGA_SOC64
        bool "Enable support for Intel SOCFPGA SoC64 family (Stratix10/Agilex)"
-       depends on ARCH_SOCFPGA && (TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX)
+       depends on ARCH_SOCFPGA && TARGET_SOCFPGA_SOC64
        help
          This enables the system reset driver support for Intel SOCFPGA
          SoC64 SoCs.