crypto: qat - add delay before polling mailbox
authorGiovanni Cabiddu <giovanni.cabiddu@intel.com>
Thu, 30 Jul 2020 12:27:42 +0000 (13:27 +0100)
committerHerbert Xu <herbert@gondor.apana.org.au>
Fri, 21 Aug 2020 04:43:50 +0000 (14:43 +1000)
The mailbox CSR register has a write latency and requires a delay before
being read. This patch replaces readl_poll_timeout with read_poll_timeout
that allows to sleep before read.
The initial sleep was removed when the mailbox poll loop was replaced with
readl_poll_timeout.

Fixes: a79d471c6510 ("crypto: qat - update timeout logic in put admin msg")
Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
drivers/crypto/qat/qat_common/adf_admin.c

index 1c8ca15..ec9b390 100644 (file)
@@ -131,9 +131,10 @@ static int adf_put_admin_msg_sync(struct adf_accel_dev *accel_dev, u32 ae,
        memcpy(admin->virt_addr + offset, in, ADF_ADMINMSG_LEN);
        ADF_CSR_WR(mailbox, mb_offset, 1);
 
-       ret = readl_poll_timeout(mailbox + mb_offset, status,
-                                status == 0, ADF_ADMIN_POLL_DELAY_US,
-                                ADF_ADMIN_POLL_TIMEOUT_US);
+       ret = read_poll_timeout(ADF_CSR_RD, status, status == 0,
+                               ADF_ADMIN_POLL_DELAY_US,
+                               ADF_ADMIN_POLL_TIMEOUT_US, true,
+                               mailbox, mb_offset);
        if (ret < 0) {
                /* Response timeout */
                dev_err(&GET_DEV(accel_dev),