hwrng: Add StarFive JH7100 Random Number Generator driver
authorHuan Feng <huan.feng@starfivetech.com>
Thu, 7 Jan 2021 19:35:42 +0000 (03:35 +0800)
committerŁukasz Stelmach <l.stelmach@samsung.com>
Thu, 9 Feb 2023 18:32:39 +0000 (19:32 +0100)
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
drivers/char/hw_random/Kconfig
drivers/char/hw_random/Makefile
drivers/char/hw_random/starfive-vic-rng.c [new file with mode: 0644]
drivers/char/hw_random/starfive-vic-rng.h [new file with mode: 0644]

index 3da8e85..f7f38b4 100644 (file)
@@ -322,6 +322,19 @@ config HW_RANDOM_POWERNV
 
          If unsure, say Y.
 
+config HW_RANDOM_STARFIVE_VIC
+       tristate "Starfive VIC Random Number Generator support"
+       depends on HW_RANDOM && (SOC_STARFIVE || COMPILE_TEST)
+       default SOC_STARFIVE
+       help
+         This driver provides kernel-side support for the Random Number
+         Generator hardware found on Starfive VIC SoC.
+
+         To compile this driver as a module, choose M here: the
+         module will be called starfive-vic-rng.
+
+         If unsure, say Y.
+
 config HW_RANDOM_HISI
        tristate "Hisilicon Random Number Generator support"
        depends on HW_RANDOM && ARCH_HISI
index 3e948cf..157ea23 100644 (file)
@@ -28,6 +28,7 @@ obj-$(CONFIG_HW_RANDOM_OCTEON) += octeon-rng.o
 obj-$(CONFIG_HW_RANDOM_NOMADIK) += nomadik-rng.o
 obj-$(CONFIG_HW_RANDOM_PSERIES) += pseries-rng.o
 obj-$(CONFIG_HW_RANDOM_POWERNV) += powernv-rng.o
+obj-$(CONFIG_HW_RANDOM_STARFIVE_VIC)   += starfive-vic-rng.o
 obj-$(CONFIG_HW_RANDOM_HISI)   += hisi-rng.o
 obj-$(CONFIG_HW_RANDOM_BCM2835) += bcm2835-rng.o
 obj-$(CONFIG_HW_RANDOM_IPROC_RNG200) += iproc-rng200.o
diff --git a/drivers/char/hw_random/starfive-vic-rng.c b/drivers/char/hw_random/starfive-vic-rng.c
new file mode 100644 (file)
index 0000000..1e003b7
--- /dev/null
@@ -0,0 +1,256 @@
+/*
+ ******************************************************************************
+ * @file  starfive-vic-rng.c
+ * @author  StarFive Technology
+ * @version  V1.0
+ * @date  08/13/2020
+ * @brief
+ ******************************************************************************
+ * @copy
+ *
+ * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+ * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+ * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+ * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+ * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+ * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+ *
+ * COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+ */
+#include <linux/err.h>
+#include <linux/kernel.h>
+#include <linux/hw_random.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/interrupt.h>
+#include <linux/random.h>
+
+#include "starfive-vic-rng.h"
+
+#define to_vic_rng(p)  container_of(p, struct vic_rng, rng)
+
+struct vic_rng {
+       struct device   *dev;
+       void __iomem    *base;
+       struct hwrng    rng;
+};
+
+static inline void vic_wait_till_idle(struct vic_rng *hrng)
+{
+       while(readl(hrng->base + VIC_STAT) & VIC_STAT_BUSY)
+               ;
+}
+
+static inline void vic_rng_irq_mask_clear(struct vic_rng *hrng)
+{
+       // clear register: ISTAT
+       u32 data = readl(hrng->base + VIC_ISTAT);
+       writel(data, hrng->base + VIC_ISTAT);
+       writel(0, hrng->base + VIC_ALARM);
+}
+
+static int vic_trng_cmd(struct vic_rng *hrng, u32 cmd) {
+       int res = 0;
+       // wait till idle
+       vic_wait_till_idle(hrng);
+       switch (cmd) {
+       case VIC_CTRL_CMD_NOP:
+       case VIC_CTRL_CMD_GEN_NOISE:
+       case VIC_CTRL_CMD_GEN_NONCE:
+       case VIC_CTRL_CMD_CREATE_STATE:
+       case VIC_CTRL_CMD_RENEW_STATE:
+       case VIC_CTRL_CMD_REFRESH_ADDIN:
+       case VIC_CTRL_CMD_GEN_RANDOM:
+       case VIC_CTRL_CMD_ADVANCE_STATE:
+       case VIC_CTRL_CMD_KAT:
+       case VIC_CTRL_CMD_ZEROIZE:
+               writel(cmd, hrng->base + VIC_CTRL);
+               break;
+       default:
+               res = -1;
+               break;
+       }
+
+       return res;
+}
+
+static int vic_rng_init(struct hwrng *rng)
+{
+       struct vic_rng *hrng = to_vic_rng(rng);
+
+       // wait till idle
+
+       // clear register: ISTAT
+       vic_rng_irq_mask_clear(hrng);
+
+       // set mission mode
+       writel(VIC_SMODE_SECURE_EN(1), hrng->base + VIC_SMODE);
+
+       vic_trng_cmd(hrng, VIC_CTRL_CMD_GEN_NOISE);
+       vic_wait_till_idle(hrng);
+
+       // set interrupt
+       writel(VIC_IE_ALL, hrng->base + VIC_IE);
+
+       // zeroize
+       vic_trng_cmd(hrng, VIC_CTRL_CMD_ZEROIZE);
+
+       vic_wait_till_idle(hrng);
+
+       return 0;
+}
+
+static irqreturn_t vic_rng_irq(int irq, void *priv)
+{
+       u32 status, val;
+       struct vic_rng *hrng = (struct vic_rng *)priv;
+
+       /*
+        * clearing the interrupt will also clear the error register
+        * read error and status before clearing
+        */
+       status = readl(hrng->base + VIC_ISTAT);
+
+       if (status & VIC_ISTAT_ALARMS) {
+               writel(VIC_ISTAT_ALARMS, hrng->base + VIC_ISTAT);
+               val = readl(hrng->base + VIC_ALARM);
+               if (val & VIC_ALARM_ILLEGAL_CMD_SEQ) {
+                       writel(VIC_ALARM_ILLEGAL_CMD_SEQ, hrng->base + VIC_ALARM);
+                       //dev_info(hrng->dev, "ILLEGAL CMD SEQ: LAST_CMD=0x%x\r\n",
+                       //VIC_STAT_LAST_CMD(readl(hrng->base + VIC_STAT)));
+               } else {
+                       dev_info(hrng->dev, "Failed test: %x\r\n", val);
+               }
+       }
+
+       if (status & VIC_ISTAT_ZEROIZE) {
+               writel(VIC_ISTAT_ZEROIZE, hrng->base + VIC_ISTAT);
+               //dev_info(hrng->dev, "zeroized\r\n");
+       }
+
+       if (status & VIC_ISTAT_KAT_COMPLETE) {
+               writel(VIC_ISTAT_KAT_COMPLETE, hrng->base + VIC_ISTAT);
+               //dev_info(hrng->dev, "kat_completed\r\n");
+       }
+
+       if (status & VIC_ISTAT_NOISE_RDY) {
+               writel(VIC_ISTAT_NOISE_RDY, hrng->base + VIC_ISTAT);
+               //dev_info(hrng->dev, "noise_rdy\r\n");
+       }
+
+       if (status & VIC_ISTAT_DONE) {
+               writel(VIC_ISTAT_DONE, hrng->base + VIC_ISTAT);
+               //dev_info(hrng->dev, "done\r\n");
+               /*
+               if (VIC_STAT_LAST_CMD(readl(hrng->base + VIC_STAT)) ==
+                   VIC_CTRL_CMD_GEN_RANDOM) {
+                       dev_info(hrng->dev, "Need Update Buffer\r\n");
+               }
+               */
+       }
+       vic_rng_irq_mask_clear(hrng);
+
+       return IRQ_HANDLED;
+}
+
+static void vic_rng_cleanup(struct hwrng *rng)
+{
+       struct vic_rng *hrng = to_vic_rng(rng);
+
+       writel(0, hrng->base + VIC_CTRL);
+}
+
+static int vic_rng_read(struct hwrng *rng, void *buf, size_t max, bool wait)
+{
+       struct vic_rng *hrng = to_vic_rng(rng);
+
+       vic_trng_cmd(hrng, VIC_CTRL_CMD_ZEROIZE);
+       vic_trng_cmd(hrng, VIC_CTRL_CMD_GEN_NOISE);
+       vic_trng_cmd(hrng, VIC_CTRL_CMD_CREATE_STATE);
+
+       vic_wait_till_idle(hrng);
+       max = min_t(size_t, max, (VIC_RAND_LEN * 4));
+
+       writel(0x0, hrng->base + VIC_MODE);
+       vic_trng_cmd(hrng, VIC_CTRL_CMD_GEN_RANDOM);
+
+       vic_wait_till_idle(hrng);
+       memcpy_fromio(buf, hrng->base + VIC_RAND0, max);
+       vic_trng_cmd(hrng, VIC_CTRL_CMD_ZEROIZE);
+
+       vic_wait_till_idle(hrng);
+       return max;
+}
+
+static int vic_rng_probe(struct platform_device *pdev)
+{
+       int ret;
+       int irq;
+       struct vic_rng *rng;
+       struct resource *res;
+
+       rng = devm_kzalloc(&pdev->dev, sizeof(*rng), GFP_KERNEL);
+       if (!rng){
+               return -ENOMEM;
+       }
+
+       platform_set_drvdata(pdev, rng);
+
+       res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+       rng->base = devm_ioremap_resource(&pdev->dev, res);
+       if (IS_ERR(rng->base)){
+               return PTR_ERR(rng->base);
+       }
+
+       irq = platform_get_irq(pdev, 0);
+       if (irq <= 0) {
+               dev_err(&pdev->dev, "Couldn't get irq %d\n", irq);
+               return irq;
+       }
+
+       ret = devm_request_irq(&pdev->dev, irq, vic_rng_irq, 0, pdev->name,
+                               (void *)rng);
+       if (ret) {
+               dev_err(&pdev->dev, "Can't get interrupt working.\n");
+               return ret;
+       }
+
+       rng->rng.name = pdev->name;
+       rng->rng.init = vic_rng_init;
+       rng->rng.cleanup = vic_rng_cleanup;
+       rng->rng.read = vic_rng_read;
+
+       rng->dev = &pdev->dev;
+
+       ret = devm_hwrng_register(&pdev->dev, &rng->rng);
+       if (ret) {
+               dev_err(&pdev->dev, "failed to register hwrng\n");
+               return ret;
+       }
+
+       dev_info(&pdev->dev, "Initialized\n");
+
+       return 0;
+}
+
+static const struct of_device_id vic_rng_dt_ids[] = {
+       { .compatible = "starfive,vic-rng" },
+       { }
+};
+MODULE_DEVICE_TABLE(of, vic_rng_dt_ids);
+
+static struct platform_driver vic_rng_driver = {
+       .probe          = vic_rng_probe,
+       .driver         = {
+               .name           = "vic-rng",
+               .of_match_table = vic_rng_dt_ids,
+       },
+};
+
+module_platform_driver(vic_rng_driver);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Huan Feng <huan.feng@starfivetech.com>");
+MODULE_DESCRIPTION("Starfive VIC random number generator driver");
diff --git a/drivers/char/hw_random/starfive-vic-rng.h b/drivers/char/hw_random/starfive-vic-rng.h
new file mode 100644 (file)
index 0000000..b3bbabd
--- /dev/null
@@ -0,0 +1,167 @@
+/*
+ ******************************************************************************
+ * @file  starfive-vic-rng.h
+ * @author  StarFive Technology
+ * @version  V1.0
+ * @date  08/13/2020
+ * @brief
+ ******************************************************************************
+ * @copy
+ *
+ * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+ * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+ * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+ * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+ * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+ * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+ *
+ * COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+ */
+
+#define VIC_CTRL               0x00
+#define VIC_MODE               0x04
+#define VIC_SMODE              0x08
+#define VIC_STAT               0x0C
+#define VIC_IE                 0x10
+#define VIC_ISTAT              0x14
+#define VIC_ALARM              0x18
+#define VIC_BUILD_ID           0x1C
+#define VIC_FEATURES           0x20
+#define VIC_RAND0              0x24
+#define VIC_NPA_DATA0          0x34
+#define VIC_SEED0              0x74
+#define VIC_IA_RDATA           0xA4
+#define VIC_IA_WDATA           0xA8
+#define VIC_IA_ADDR            0xAC
+#define VIC_IA_CMD             0xB0
+
+/* CTRL */
+#define VIC_CTRL_CMD_NOP               0
+#define VIC_CTRL_CMD_GEN_NOISE         1
+#define VIC_CTRL_CMD_GEN_NONCE         2
+#define VIC_CTRL_CMD_CREATE_STATE      3
+#define VIC_CTRL_CMD_RENEW_STATE       4
+#define VIC_CTRL_CMD_REFRESH_ADDIN     5
+#define VIC_CTRL_CMD_GEN_RANDOM                6
+#define VIC_CTRL_CMD_ADVANCE_STATE     7
+#define VIC_CTRL_CMD_KAT               8
+#define VIC_CTRL_CMD_ZEROIZE           15
+
+/* MODE */
+#define _VIC_MODE_ADDIN_PRESENT                4
+#define _VIC_MODE_PRED_RESIST          3
+#define _VIC_MODE_KAT_SEL              2
+#define _VIC_MODE_KAT_VEC              1
+#define _VIC_MODE_SEC_ALG              0
+
+#define VIC_MODE_ADDIN_PRESENT (1UL << _VIC_MODE_ADDIN_PRESENT)
+#define VIC_MODE_PRED_RESIST   (1UL << _VIC_MODE_PRED_RESIST)
+#define VIC_MODE_KAT_SEL       (1UL << _VIC_MODE_KAT_SEL)
+#define VIC_MODE_KAT_VEC       (1UL << _VIC_MODE_KAT_VEC)
+#define VIC_MODE_SEC_ALG       (1UL << _VIC_MODE_SEC_ALG)
+
+/* SMODE */
+#define _VIC_SMODE_MAX_REJECTS 2
+#define _VIC_SMODE_SECURE_EN   1
+#define _VIC_SMODE_NONCE       0
+
+#define VIC_SMODE_MAX_REJECTS(x)       ((x) << _VIC_SMODE_MAX_REJECTS)
+#define VIC_SMODE_SECURE_EN(x)         ((x) << _VIC_SMODE_SECURE_EN)
+#define VIC_SMODE_NONCE                        (1UL << _VIC_SMODE_NONCE)
+
+/* STAT */
+#define _VIC_STAT_BUSY         31
+#define _VIC_STAT_DRBG_STATE   7
+#define _VIC_STAT_SECURE       6
+#define _VIC_STAT_NONCE_MODE   5
+#define _VIC_STAT_SEC_ALG      4
+#define _VIC_STAT_LAST_CMD     0
+
+#define VIC_STAT_BUSY          (1UL << _VIC_STAT_BUSY)
+#define VIC_STAT_DRBG_STATE    (1UL << _VIC_STAT_DRBG_STATE)
+#define VIC_STAT_SECURE                (1UL << _VIC_STAT_SECURE)
+#define VIC_STAT_NONCE_MODE    (1UL << _VIC_STAT_NONCE_MODE)
+#define VIC_STAT_SEC_ALG       (1UL << _VIC_STAT_SEC_ALG)
+#define VIC_STAT_LAST_CMD(x)   (((x) >> _VIC_STAT_LAST_CMD) & 0xF)
+
+/* IE */
+#define _VIC_IE_GLBL           31
+#define _VIC_IE_DONE           4
+#define _VIC_IE_ALARMS         3
+#define _VIC_IE_NOISE_RDY      2
+#define _VIC_IE_KAT_COMPLETE   1
+#define _VIC_IE_ZEROIZE                0
+
+#define VIC_IE_GLBL            (1UL << _VIC_IE_GLBL)
+#define VIC_IE_DONE            (1UL << _VIC_IE_DONE)
+#define VIC_IE_ALARMS          (1UL << _VIC_IE_ALARMS)
+#define VIC_IE_NOISE_RDY       (1UL << _VIC_IE_NOISE_RDY)
+#define VIC_IE_KAT_COMPLETE    (1UL << _VIC_IE_KAT_COMPLETE)
+#define VIC_IE_ZEROIZE         (1UL << _VIC_IE_ZEROIZE)
+#define VIC_IE_ALL             (VIC_IE_GLBL | VIC_IE_DONE | VIC_IE_ALARMS | \
+                                VIC_IE_NOISE_RDY | VIC_IE_KAT_COMPLETE | VIC_IE_ZEROIZE)
+
+/* ISTAT */
+#define _VIC_ISTAT_DONE                4
+#define _VIC_ISTAT_ALARMS      3
+#define _VIC_ISTAT_NOISE_RDY   2
+#define _VIC_ISTAT_KAT_COMPLETE        1
+#define _VIC_ISTAT_ZEROIZE     0
+
+#define VIC_ISTAT_DONE         (1UL << _VIC_ISTAT_DONE)
+#define VIC_ISTAT_ALARMS       (1UL << _VIC_ISTAT_ALARMS)
+#define VIC_ISTAT_NOISE_RDY    (1UL << _VIC_ISTAT_NOISE_RDY)
+#define VIC_ISTAT_KAT_COMPLETE (1UL << _VIC_ISTAT_KAT_COMPLETE)
+#define VIC_ISTAT_ZEROIZE      (1UL << _VIC_ISTAT_ZEROIZE)
+
+/* ALARMS */
+#define VIC_ALARM_ILLEGAL_CMD_SEQ                      (1UL << 4)
+#define VIC_ALARM_FAILED_TEST_ID_OK                    0
+#define VIC_ALARM_FAILED_TEST_ID_KAT_STAT              1
+#define VIC_ALARM_FAILED_TEST_ID_KAT                   2
+#define VIC_ALARM_FAILED_TEST_ID_MONOBIT               3
+#define VIC_ALARM_FAILED_TEST_ID_RUN                   4
+#define VIC_ALARM_FAILED_TEST_ID_LONGRUN               5
+#define VIC_ALARM_FAILED_TEST_ID_AUTOCORRELATION       6
+#define VIC_ALARM_FAILED_TEST_ID_POKER                 7
+#define VIC_ALARM_FAILED_TEST_ID_REPETITION_COUNT      8
+#define VIC_ALARM_FAILED_TEST_ID_ADAPATIVE_PROPORTION  9
+
+/* BUILD_ID */
+#define VIC_BUILD_ID_STEPPING(x)               (((x) >> 28) & 0xF)
+#define VIC_BUILD_ID_EPN(x)                    ((x) & 0xFFFF)
+
+/* FEATURES */
+#define VIC_FEATURES_AES_256(x)                        (((x) >> 9) & 1)
+#define VIC_FEATURES_EXTRA_PS_PRESENT(x)       (((x) >> 8) & 1)
+#define VIC_FEATURES_DIAG_LEVEL_NS(x)          (((x) >> 7) & 1)
+#define VIC_FEATURES_DIAG_LEVEL_CLP800(x)      (((x) >> 4) & 7)
+#define VIC_FEATURES_DIAG_LEVEL_ST_HLT(x)      (((x) >> 1) & 7)
+#define VIC_FEATURES_SECURE_RST_STATE(x)       ((x) & 1)
+
+/* IA_CMD */
+#define VIC_IA_CMD_GO                  (1UL << 31)
+#define VIC_IA_CMD_WR                  (1)
+
+#define _VIC_SMODE_MAX_REJECTS_MASK    255UL
+#define _VIC_SMODE_SECURE_EN_MASK      1UL
+#define _VIC_SMODE_NONCE_MASK          1UL
+#define _VIC_MODE_SEC_ALG_MASK         1UL
+#define _VIC_MODE_ADDIN_PRESENT_MASK   1UL
+#define _VIC_MODE_PRED_RESIST_MASK     1UL
+
+#define VIC_SMODE_SET_MAX_REJECTS(y, x)        (((y) & ~(_VIC_SMODE_MAX_REJECTS_MASK << _VIC_SMODE_MAX_REJECTS)) | ((x) << _VIC_SMODE_MAX_REJECTS))
+#define VIC_SMODE_SET_SECURE_EN(y, x)  (((y) & ~(_VIC_SMODE_SECURE_EN_MASK   << _VIC_SMODE_SECURE_EN))   | ((x) << _VIC_SMODE_SECURE_EN))
+#define VIC_SMODE_SET_NONCE(y, x)      (((y) & ~(_VIC_SMODE_NONCE_MASK       << _VIC_SMODE_NONCE))       | ((x) << _VIC_SMODE_NONCE))
+#define VIC_SMODE_GET_MAX_REJECTS(x)   (((x) >> _VIC_SMODE_MAX_REJECTS) & _VIC_SMODE_MAX_REJECTS_MASK)
+#define VIC_SMODE_GET_SECURE_EN(x)     (((x) >> _VIC_SMODE_SECURE_EN)   & _VIC_SMODE_SECURE_EN_MASK)
+#define VIC_SMODE_GET_NONCE(x)         (((x) >> _VIC_SMODE_NONCE)       & _VIC_SMODE_NONCE_MASK)
+
+#define VIC_MODE_SET_SEC_ALG(y, x)     (((y) & ~(_VIC_MODE_SEC_ALG_MASK       << _VIC_MODE_SEC_ALG))   | ((x) << _VIC_MODE_SEC_ALG))
+#define VIC_MODE_SET_PRED_RESIST(y, x) (((y) & ~(_VIC_MODE_PRED_RESIST_MASK   << _VIC_MODE_PRED_RESIST))    | ((x) << _VIC_MODE_PRED_RESIST))
+#define VIC_MODE_SET_ADDIN_PRESENT(y, x) (((y) & ~(_VIC_MODE_ADDIN_PRESENT_MASK << _VIC_MODE_ADDIN_PRESENT))  | ((x) << _VIC_MODE_ADDIN_PRESENT))
+#define VIC_MODE_GET_SEC_ALG(x)                (((x) >> _VIC_MODE_SEC_ALG)       & _VIC_MODE_SEC_ALG_MASK)
+#define VIC_MODE_GET_PRED_RESIST(x)    (((x) >> _VIC_MODE_PRED_RESIST)   & _VIC_MODE_PRED_RESIST_MASK)
+#define VIC_MODE_GET_ADDIN_PRESENT(x)  (((x) >> _VIC_MODE_ADDIN_PRESENT) & _VIC_MODE_ADDIN_PRESENT_MASK)
+
+#define VIC_RAND_LEN 4