armv8: lsch3: Fix lane protocol parsing logic
authorPrabhakar Kushwaha <prabhakar@freescale.com>
Wed, 4 Nov 2015 06:55:52 +0000 (12:25 +0530)
committerYork Sun <yorksun@freescale.com>
Mon, 30 Nov 2015 16:53:02 +0000 (08:53 -0800)
Current implementation only consider SGMIIs for dpmac initialization.
XFI serdes protocols also uses dpmac.

Also, fix lane protocol parsing logic to consider both XFIs and SGMIIs.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
drivers/net/ldpaa_eth/ldpaa_wriop.c

index 2ab8da6..918e889 100644 (file)
@@ -18,6 +18,11 @@ static u8 serdes1_prtcl_map[SERDES_PRCTL_COUNT];
 static u8 serdes2_prtcl_map[SERDES_PRCTL_COUNT];
 #endif
 
+#ifdef CONFIG_FSL_MC_ENET
+int xfi_dpmac[XFI8 + 1];
+int sgmii_dpmac[SGMII16 + 1];
+#endif
+
 int is_serdes_configured(enum srds_prtcl device)
 {
        int ret = 0;
@@ -116,9 +121,15 @@ void serdes_init(u32 sd, u32 sd_addr, u32 sd_prctl_mask, u32 sd_prctl_shift,
                                wriop_init_dpmac(sd, 12, (int)lane_prtcl);
                                break;
                        default:
+                               if (lane_prtcl >= XFI1 && lane_prtcl <= XFI8)
+                                       wriop_init_dpmac(sd,
+                                                        xfi_dpmac[lane_prtcl],
+                                                        (int)lane_prtcl);
+
                                 if (lane_prtcl >= SGMII1 &&
-                                          lane_prtcl <= SGMII16)
-                                       wriop_init_dpmac(sd, lane + 1,
+                                    lane_prtcl <= SGMII16)
+                                       wriop_init_dpmac(sd, sgmii_dpmac[
+                                                        lane_prtcl],
                                                         (int)lane_prtcl);
                                break;
                        }
@@ -129,6 +140,16 @@ void serdes_init(u32 sd, u32 sd_addr, u32 sd_prctl_mask, u32 sd_prctl_shift,
 
 void fsl_serdes_init(void)
 {
+#ifdef CONFIG_FSL_MC_ENET
+       int i , j;
+
+       for (i = XFI1, j = 1; i <= XFI8; i++, j++)
+               xfi_dpmac[i] = j;
+
+       for (i = SGMII1, j = 1; i <= SGMII16; i++, j++)
+               sgmii_dpmac[i] = j;
+#endif
+
 #ifdef CONFIG_SYS_FSL_SRDS_1
        serdes_init(FSL_SRDS_1,
                    CONFIG_SYS_FSL_LSCH3_SERDES_ADDR,
index 926057a..c38243a 100644 (file)
@@ -23,17 +23,16 @@ __weak phy_interface_t wriop_dpmac_enet_if(int dpmac_id, int lane_prtc)
 void wriop_init_dpmac(int sd, int dpmac_id, int lane_prtcl)
 {
        phy_interface_t enet_if;
-       int index = dpmac_id + sd * 8;
 
-       dpmac_info[index].enabled = 0;
-       dpmac_info[index].id = 0;
-       dpmac_info[index].enet_if = PHY_INTERFACE_MODE_NONE;
+       dpmac_info[dpmac_id].enabled = 0;
+       dpmac_info[dpmac_id].id = 0;
+       dpmac_info[dpmac_id].enet_if = PHY_INTERFACE_MODE_NONE;
 
-       enet_if = wriop_dpmac_enet_if(index, lane_prtcl);
+       enet_if = wriop_dpmac_enet_if(dpmac_id, lane_prtcl);
        if (enet_if != PHY_INTERFACE_MODE_NONE) {
-               dpmac_info[index].enabled = 1;
-               dpmac_info[index].id = index;
-               dpmac_info[index].enet_if = enet_if;
+               dpmac_info[dpmac_id].enabled = 1;
+               dpmac_info[dpmac_id].id = dpmac_id;
+               dpmac_info[dpmac_id].enet_if = enet_if;
        }
 }