powerpc: MPC8560: Remove macro CONFIG_MPC8560
authorYork Sun <york.sun@nxp.com>
Wed, 16 Nov 2016 19:26:45 +0000 (11:26 -0800)
committerYork Sun <york.sun@nxp.com>
Thu, 24 Nov 2016 07:42:05 +0000 (23:42 -0800)
Replace CONFIG_MPC8560 with ARCH_MPC8560 in Kconfig and clean up existing
macros.

Signed-off-by: York Sun <york.sun@nxp.com>
arch/powerpc/cpu/mpc85xx/Kconfig
arch/powerpc/cpu/mpc85xx/cpu.c
arch/powerpc/cpu/mpc85xx/speed.c
arch/powerpc/include/asm/config_mpc85xx.h
arch/powerpc/include/asm/fsl_lbc.h
include/configs/MPC8560ADS.h
scripts/config_whitelist.txt

index c58f76f..98f98af 100644 (file)
@@ -80,6 +80,7 @@ config TARGET_MPC8555CDS
 
 config TARGET_MPC8560ADS
        bool "Support MPC8560ADS"
+       select ARCH_MPC8560
 
 config TARGET_MPC8568MDS
        bool "Support MPC8568MDS"
@@ -211,6 +212,9 @@ config ARCH_MPC8548
 config ARCH_MPC8555
        bool
 
+config ARCH_MPC8560
+       bool
+
 source "board/freescale/b4860qds/Kconfig"
 source "board/freescale/bsc9131rdb/Kconfig"
 source "board/freescale/bsc9132qds/Kconfig"
index 3e6f8f3..268429b 100644 (file)
@@ -294,7 +294,7 @@ int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
 /* Everything after the first generation of PQ3 parts has RSTCR */
 #if defined(CONFIG_ARCH_MPC8540) || defined(CONFIG_ARCH_MPC8541) || \
-       defined(CONFIG_ARCH_MPC8555) || defined(CONFIG_MPC8560)
+       defined(CONFIG_ARCH_MPC8555) || defined(CONFIG_ARCH_MPC8560)
        unsigned long val, msr;
 
        /*
index 93c7193..a7f43b6 100644 (file)
@@ -626,7 +626,7 @@ void get_sys_info(sys_info_t *sys_info)
                 */
                lcrr_div *= 4;
 #elif !defined(CONFIG_ARCH_MPC8540) && !defined(CONFIG_ARCH_MPC8541) && \
-       !defined(CONFIG_ARCH_MPC8555) && !defined(CONFIG_MPC8560)
+       !defined(CONFIG_ARCH_MPC8555) && !defined(CONFIG_ARCH_MPC8560)
                /*
                 * Yes, the entire PQ38 family use the same
                 * bit-representation for twice the clock divider values.
@@ -682,7 +682,7 @@ int get_clocks (void)
         * AN2919.
         */
 #if defined(CONFIG_ARCH_MPC8540) || defined(CONFIG_ARCH_MPC8541) || \
-       defined(CONFIG_MPC8560) || defined(CONFIG_ARCH_MPC8555) || \
+       defined(CONFIG_ARCH_MPC8560) || defined(CONFIG_ARCH_MPC8555) || \
        defined(CONFIG_P1022)
        gd->arch.i2c1_clk = sys_info.freq_systembus;
 #elif defined(CONFIG_ARCH_MPC8544)
index 4e38d23..ef591b9 100644 (file)
@@ -92,7 +92,7 @@
 #define CONFIG_SYS_FSL_SEC_COMPAT      2
 #define CONFIG_SYS_CCSRBAR_DEFAULT     0xff700000
 
-#elif defined(CONFIG_MPC8560)
+#elif defined(CONFIG_ARCH_MPC8560)
 #define CONFIG_MAX_CPUS                        1
 #define CONFIG_SYS_FSL_NUM_LAWS                8
 #define CONFIG_SYS_FSL_DDRC_GEN1
index ff9b2d9..b8270c5 100644 (file)
@@ -327,7 +327,7 @@ void lbc_sdram_init(void);
 #define LCRR_CLKDIV_SHIFT              0
 #if defined(CONFIG_MPC83xx) || defined(CONFIG_ARCH_MPC8540) || \
        defined(CONFIG_ARCH_MPC8541) || defined(CONFIG_ARCH_MPC8555) || \
-       defined(CONFIG_MPC8560)
+       defined(CONFIG_ARCH_MPC8560)
 #define LCRR_CLKDIV_2                  0x00000002
 #define LCRR_CLKDIV_4                  0x00000004
 #define LCRR_CLKDIV_8                  0x00000008
index 25227e5..8a0b2d8 100644 (file)
@@ -23,7 +23,6 @@
 #define CONFIG_E500            1       /* BOOKE e500 family */
 #define CONFIG_CPM2            1       /* has CPM2 */
 #define CONFIG_MPC8560ADS      1       /* MPC8560ADS board specific */
-#define CONFIG_MPC8560         1
 
 /*
  * default CCARBAR is at 0xff700000
index 39507d3..bcfb86f 100644 (file)
@@ -3141,7 +3141,6 @@ CONFIG_MPC83XX_GPIO_1_INIT_VALUE
 CONFIG_MPC83XX_PCI2
 CONFIG_MPC850
 CONFIG_MPC855
-CONFIG_MPC8560
 CONFIG_MPC8560ADS
 CONFIG_MPC8568
 CONFIG_MPC8568MDS