Merge tag 'mailbox-v6.5' of git://git.linaro.org/landing-teams/working/fujitsu/integr...

Pull mailbox updates from Jassi Brar:

 - tegra: support for Tegra264

 - broadcom: convert bcm2835 bindings from txt to yaml bcm2835

 - qcom: support for IPQ5018

 - ti: always zero TX data fields

* tag 'mailbox-v6.5' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
  mailbox: ti-msgmgr: Fill non-message tx data fields with 0x0
  mailbox: tegra: add support for Tegra264
  dt-bindings: mailbox: tegra: Document Tegra264 HSP
  dt-bindings: mailbox: convert bcm2835-mbox bindings to YAML
  dt-bindings: mailbox: qcom: Add IPQ5018 APCS compatible

diff --git a/Documentation/devicetree/bindings/mailbox/brcm,bcm2835-mbox.txt b/Documentation/devicetree/bindings/mailbox/brcm,bcm2835-mbox.txt
deleted file mode 100644 (file)
index b48d7d3..0000000
--- a/Documentation/devicetree/bindings/mailbox/brcm,bcm2835-mbox.txt
+++ /dev/null
@@ -1,26 +0,0 @@
-Broadcom BCM2835 VideoCore mailbox IPC
-
-Required properties:
-
-- compatible:  Should be "brcm,bcm2835-mbox"
-- reg:         Specifies base physical address and size of the registers
-- interrupts:  The interrupt number
-                 See bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt
-- #mbox-cells: Specifies the number of cells needed to encode a mailbox
-                 channel. The value shall be 0, since there is only one
-                 mailbox channel implemented by the device.
-
-Example:
-
-mailbox: mailbox@7e00b880 {
-       compatible = "brcm,bcm2835-mbox";
-       reg = <0x7e00b880 0x40>;
-       interrupts = <0 1>;
-       #mbox-cells = <0>;
-};
-
-firmware: firmware {
-       compatible = "raspberrypi,firmware";
-       mboxes = <&mailbox>;
-       #power-domain-cells = <1>;
-};

diff --git a/Documentation/devicetree/bindings/mailbox/brcm,bcm2835-mbox.yaml b/Documentation/devicetree/bindings/mailbox/brcm,bcm2835-mbox.yaml
new file mode 100644 (file)
index 0000000..9588817
--- /dev/null
+++ b/Documentation/devicetree/bindings/mailbox/brcm,bcm2835-mbox.yaml
@@ -0,0 +1,40 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mailbox/brcm,bcm2835-mbox.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Broadcom BCM2835 VideoCore mailbox IPC
+
+maintainers:
+  - Stefan Wahren <stefan.wahren@i2se.com>
+
+properties:
+  compatible:
+    const: brcm,bcm2835-mbox
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  "#mbox-cells":
+    const: 0
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - "#mbox-cells"
+
+additionalProperties: false
+
+examples:
+  - |
+    mailbox@7e00b880 {
+      compatible = "brcm,bcm2835-mbox";
+      reg = <0x7e00b880 0x40>;
+      interrupts = <0 1>;
+      #mbox-cells = <0>;
+    };

diff --git a/Documentation/devicetree/bindings/mailbox/nvidia,tegra186-hsp.yaml b/Documentation/devicetree/bindings/mailbox/nvidia,tegra186-hsp.yaml
index a3e8751..2d14fc9 100644 (file)
--- a/Documentation/devicetree/bindings/mailbox/nvidia,tegra186-hsp.yaml
+++ b/Documentation/devicetree/bindings/mailbox/nvidia,tegra186-hsp.yaml
@@ -66,6 +66,7 @@ properties:
     oneOf:
       - const: nvidia,tegra186-hsp
       - const: nvidia,tegra194-hsp
+      - const: nvidia,tegra264-hsp
       - items:
           - const: nvidia,tegra234-hsp
           - const: nvidia,tegra194-hsp

diff --git a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml
index 32d7bbc..d2e25ff 100644 (file)
--- a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml
+++ b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml
@@ -18,6 +18,7 @@ properties:
     oneOf:
       - items:
           - enum:
+              - qcom,ipq5018-apcs-apps-global
               - qcom,ipq5332-apcs-apps-global
               - qcom,ipq8074-apcs-apps-global
               - qcom,ipq9574-apcs-apps-global

diff --git a/drivers/mailbox/tegra-hsp.c b/drivers/mailbox/tegra-hsp.c
index 573481e..7f98e74 100644 (file)
--- a/drivers/mailbox/tegra-hsp.c
+++ b/drivers/mailbox/tegra-hsp.c
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /*
- * Copyright (c) 2016-2018, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2023, NVIDIA CORPORATION.  All rights reserved.
  */
 
 #include <linux/delay.h>
@@ -97,6 +97,7 @@ struct tegra_hsp_soc {
        const struct tegra_hsp_db_map *map;
        bool has_per_mb_ie;
        bool has_128_bit_mb;
+       unsigned int reg_stride;
 };
 
 struct tegra_hsp {
@@ -279,7 +280,7 @@ tegra_hsp_doorbell_create(struct tegra_hsp *hsp, const char *name,
                return ERR_PTR(-ENOMEM);
 
        offset = (1 + (hsp->num_sm / 2) + hsp->num_ss + hsp->num_as) * SZ_64K;
-       offset += index * 0x100;
+       offset += index * hsp->soc->reg_stride;
 
        db->channel.regs = hsp->regs + offset;
        db->channel.hsp = hsp;
@@ -916,24 +917,35 @@ static const struct tegra_hsp_soc tegra186_hsp_soc = {
        .map = tegra186_hsp_db_map,
        .has_per_mb_ie = false,
        .has_128_bit_mb = false,
+       .reg_stride = 0x100,
 };
 
 static const struct tegra_hsp_soc tegra194_hsp_soc = {
        .map = tegra186_hsp_db_map,
        .has_per_mb_ie = true,
        .has_128_bit_mb = false,
+       .reg_stride = 0x100,
 };
 
 static const struct tegra_hsp_soc tegra234_hsp_soc = {
        .map = tegra186_hsp_db_map,
        .has_per_mb_ie = false,
        .has_128_bit_mb = true,
+       .reg_stride = 0x100,
+};
+
+static const struct tegra_hsp_soc tegra264_hsp_soc = {
+       .map = tegra186_hsp_db_map,
+       .has_per_mb_ie = false,
+       .has_128_bit_mb = true,
+       .reg_stride = 0x1000,
 };
 
 static const struct of_device_id tegra_hsp_match[] = {
        { .compatible = "nvidia,tegra186-hsp", .data = &tegra186_hsp_soc },
        { .compatible = "nvidia,tegra194-hsp", .data = &tegra194_hsp_soc },
        { .compatible = "nvidia,tegra234-hsp", .data = &tegra234_hsp_soc },
+       { .compatible = "nvidia,tegra264-hsp", .data = &tegra264_hsp_soc },
        { }
 };
 

diff --git a/drivers/mailbox/ti-msgmgr.c b/drivers/mailbox/ti-msgmgr.c
index ddac423..03048cb 100644 (file)
--- a/drivers/mailbox/ti-msgmgr.c
+++ b/drivers/mailbox/ti-msgmgr.c
@@ -430,14 +430,20 @@ static int ti_msgmgr_send_data(struct mbox_chan *chan, void *data)
                /* Ensure all unused data is 0 */
                data_trail &= 0xFFFFFFFF >> (8 * (sizeof(u32) - trail_bytes));
                writel(data_trail, data_reg);
-               data_reg++;
+               data_reg += sizeof(u32);
        }
+
        /*
         * 'data_reg' indicates next register to write. If we did not already
         * write on tx complete reg(last reg), we must do so for transmit
+        * In addition, we also need to make sure all intermediate data
+        * registers(if any required), are reset to 0 for TISCI backward
+        * compatibility to be maintained.
         */
-       if (data_reg <= qinst->queue_buff_end)
-               writel(0, qinst->queue_buff_end);
+       while (data_reg <= qinst->queue_buff_end) {
+               writel(0, data_reg);
+               data_reg += sizeof(u32);
+       }
 
        /* If we are in polled mode, wait for a response before proceeding */
        if (ti_msgmgr_chan_has_polled_queue_rx(message->chan_rx))