NAND: DaVinci: allow forced disable of subpage writes

This patch introduces a configurable mechanism to disable
subpage writes in the DaVinci NAND driver.

Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Acked-by: Tom Rini <trini@ti.com>

diff --git a/README b/README
index f39accf..c9990e6 100644 (file)
--- a/README
+++ b/README
@@ -4496,6 +4496,11 @@ Low Level (hardware related) configuration options:
 - CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC:
                Enables the RTC32K OSC on AM33xx based plattforms
 
+- CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
+               Option to disable subpage write in NAND driver
+               driver that uses this:
+               drivers/mtd/nand/davinci_nand.c
+
 Freescale QE/FMAN Firmware Support:
 -----------------------------------
 

diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c
index 5b17d7b..75b03a7 100644 (file)
--- a/drivers/mtd/nand/davinci_nand.c
+++ b/drivers/mtd/nand/davinci_nand.c
@@ -609,6 +609,9 @@ void davinci_nand_init(struct nand_chip *nand)
 #ifdef CONFIG_SYS_NAND_USE_FLASH_BBT
        nand->bbt_options         |= NAND_BBT_USE_FLASH;
 #endif
+#ifdef CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
+       nand->options     |= NAND_NO_SUBPAGE_WRITE;
+#endif
 #ifdef CONFIG_SYS_NAND_HW_ECC
        nand->ecc.mode = NAND_ECC_HW;
        nand->ecc.size = 512;