flush_icache_range((unsigned long)(addr), \
(unsigned long)(addr) + (size))
-static inline long branch_t16_dest(kprobe_opcode_t insn, unsigned int insn_addr)
+static inline long branch_t16_dest(uprobe_opcode_t insn, unsigned int insn_addr)
{
long offset = insn & 0x3ff;
offset -= insn & 0x400;
return insn_addr + 4 + offset * 2;
}
-static inline long branch_cond_t16_dest(kprobe_opcode_t insn,
+static inline long branch_cond_t16_dest(uprobe_opcode_t insn,
unsigned int insn_addr)
{
long offset = insn & 0x7f;
return insn_addr + 4 + offset * 2;
}
-static inline long branch_t32_dest(kprobe_opcode_t insn, unsigned int insn_addr)
+static inline long branch_t32_dest(uprobe_opcode_t insn, unsigned int insn_addr)
{
unsigned int poff = insn & 0x3ff;
unsigned int offset = (insn & 0x07fe0000) >> 17;
return (insn_addr + 4 + (poff << 12) + offset * 4) & ~3;
}
-static inline long cbz_t16_dest(kprobe_opcode_t insn, unsigned int insn_addr)
+static inline long cbz_t16_dest(uprobe_opcode_t insn, unsigned int insn_addr)
{
unsigned int i = (insn & 0x200) >> 3;
unsigned int offset = (insn & 0xf8) >> 2;
}
/* is instruction Thumb2 and NOT a branch, etc... */
-static int is_thumb2(kprobe_opcode_t insn)
+static int is_thumb2(uprobe_opcode_t insn)
{
return ((insn & 0xf800) == 0xe800 ||
(insn & 0xf800) == 0xf000 ||
return ret;
}
-static int prep_pc_dep_insn_execbuf_thumb(kprobe_opcode_t *insns,
- kprobe_opcode_t insn, int uregs)
+static int prep_pc_dep_insn_execbuf_thumb(uprobe_opcode_t *insns,
+ uprobe_opcode_t insn, int uregs)
{
unsigned char mreg = 0;
unsigned char reg = 0;
*/
int arch_prepare_uretprobe(struct uretprobe_instance *ri, struct pt_regs *regs)
{
- ri->ret_addr = (kprobe_opcode_t *)regs->ARM_lr;
- ri->sp = (kprobe_opcode_t *)regs->ARM_sp;
+ ri->ret_addr = (uprobe_opcode_t *)regs->ARM_lr;
+ ri->sp = (uprobe_opcode_t *)regs->ARM_sp;
/* Set flag of current mode */
- ri->sp = (kprobe_opcode_t *)((long)ri->sp | !!thumb_mode(regs));
+ ri->sp = (uprobe_opcode_t *)((long)ri->sp | !!thumb_mode(regs));
if (ri->preload_thumb) {
regs->ARM_lr = (unsigned long)(ri->rp->up.ainsn.insn) + 0x1b;
entry_point_t entry = (entry_point_t)jp->entry;
if (pre_entry) {
- p->ss_addr[smp_processor_id()] = (kprobe_opcode_t *)
+ p->ss_addr[smp_processor_id()] = (uprobe_opcode_t *)
pre_entry(jp->priv_arg, regs);
}
static int uprobe_handler(struct pt_regs *regs)
{
- kprobe_opcode_t *addr = (kprobe_opcode_t *)(regs->ARM_pc);
+ uprobe_opcode_t *addr = (uprobe_opcode_t *)(regs->ARM_pc);
struct task_struct *task = current;
pid_t tgid = task->tgid;
struct uprobe *p;
struct uretprobe;
struct uretprobe_instance;
+typedef unsigned long uprobe_opcode_t;
+
/**
* @struct arch_specific_tramp
* @brief Stores arch-dependent trampolines.
regs->sp + 4);
if (pre_entry)
- p->ss_addr[smp_processor_id()] = (kprobe_opcode_t *)
+ p->ss_addr[smp_processor_id()] = (uprobe_opcode_t *)
pre_entry(jp->priv_arg, regs);
if (entry)
{
/* Replace the return addr with trampoline addr */
unsigned long ra = trampoline_addr(&ri->rp->up);
- ri->sp = (kprobe_opcode_t *)regs->sp;
+ ri->sp = (uprobe_opcode_t *)regs->sp;
if (!read_proc_vm_atomic(current, regs->EREG(sp), &(ri->ret_addr),
sizeof(ri->ret_addr))) {
unsigned long *tos, tos_dword = 0;
unsigned long copy_eip = (unsigned long)p->ainsn.insn;
unsigned long orig_eip = (unsigned long)p->addr;
- kprobe_opcode_t insns[2];
+ uprobe_opcode_t insns[2];
regs->EREG(flags) &= ~TF_MASK;
}
if (!read_proc_vm_atomic(current, (unsigned long)p->ainsn.insn, insns,
- 2 * sizeof(kprobe_opcode_t))) {
+ 2 * sizeof(uprobe_opcode_t))) {
printk(KERN_WARNING
"failed to read first 2 opcodes of instruction copy from user space %p!\n",
p->ainsn.insn);
static int uprobe_handler(struct pt_regs *regs)
{
struct uprobe *p;
- kprobe_opcode_t *addr;
+ uprobe_opcode_t *addr;
struct task_struct *task = current;
pid_t tgid = task->tgid;
save_current_flags(regs);
- addr = (kprobe_opcode_t *)(regs->EREG(ip) - sizeof(kprobe_opcode_t));
+ addr = (uprobe_opcode_t *)(regs->EREG(ip) - sizeof(uprobe_opcode_t));
p = get_uprobe(addr, tgid);
if (p == NULL) {
struct uretprobe;
struct uretprobe_instance;
+typedef u8 uprobe_opcode_t;
+
/**
* @struct arch_specific_tramp
* @brief Stores x86 trampoline
*/
static inline void copy_uprobe(struct uprobe *old_p, struct uprobe *p)
{
- memcpy(&p->opcode, &old_p->opcode, sizeof(kprobe_opcode_t));
+ memcpy(&p->opcode, &old_p->opcode, sizeof(uprobe_opcode_t));
memcpy(&p->ainsn, &old_p->ainsn, sizeof(struct arch_specific_insn));
#ifdef CONFIG_ARM
p->safe_arm = old_p->safe_arm;
static int arm_uprobe(struct uprobe *p)
{
- kprobe_opcode_t insn = BREAKPOINT_INSTRUCTION;
+ uprobe_opcode_t insn = BREAKPOINT_INSTRUCTION;
int ret = write_proc_vm_atomic(p->task, (unsigned long)p->addr,
&insn, sizeof(insn));
if (!ret) {
#if defined(CONFIG_ARM)
/* TODO: must be corrected in 'bundle' */
if ((unsigned long) p->addr & 0x01)
- p->addr = (kprobe_opcode_t *)((unsigned long)p->addr &
+ p->addr = (uprobe_opcode_t *)((unsigned long)p->addr &
0xfffffffe);
#endif
/** List of uprobes for multi-handler support.*/
struct list_head list;
/** Location of the probe point. */
- kprobe_opcode_t *addr;
+ uprobe_opcode_t *addr;
/** Called before addr is executed.*/
uprobe_pre_handler_t pre_handler;
/** Called after addr is executed, unless...*/
/** Return 1 if it handled fault, otherwise kernel will see it.*/
uprobe_break_handler_t break_handler;
/** Saved opcode (which has been replaced with breakpoint).*/
- kprobe_opcode_t opcode;
+ uprobe_opcode_t opcode;
/** Copy of the original instruction.*/
struct arch_specific_insn ainsn;
/** Override single-step target address, may be used to redirect
* replacement. If jprobe.entry should return address of function or
* NULL if original function should be called.
* Not supported for X86, not tested for MIPS. */
- kprobe_opcode_t *ss_addr[NR_CPUS];
+ uprobe_opcode_t *ss_addr[NR_CPUS];
#ifdef CONFIG_ARM
/** Safe/unsafe to use probe on ARM.*/
unsigned safe_arm:1;
struct hlist_node uflist; /**< Free list */
struct hlist_node hlist; /**< Used list */
struct uretprobe *rp; /**< Pointer to the parent uretprobe */
- kprobe_opcode_t *ret_addr; /**< Return address */
- kprobe_opcode_t *sp; /**< Pointer to stack */
+ uprobe_opcode_t *ret_addr; /**< Return address */
+ uprobe_opcode_t *sp; /**< Pointer to stack */
struct task_struct *task; /**< Pointer to the task struct */
#ifdef CONFIG_ARM
/* FIXME Preload: if this flag is set then ignore the thumb_mode(regs)