+2004-11-26 Alan Modra <amodra@bigpond.net.au>
+
+ PR rtl-optimization/16356
+ * config/rs6000/rs6000.md (floatdisf2_internal2): Rewrite with
+ separate output register and one less jump. Enable for powerpc64.
+ (floatdisf2): Adjust for above.
+
2004-11-25 Bob Wilson <bob.wilson@acm.org>
* config/xtensa/xtensa.h (STARTFILE_SPEC): Add crt0.
2004-11-25 Richard Henderson <rth@redhat.com>
PR c++/6764
- * reload1.c (set_initial_eh_label_offset): New.
- (set_initial_label_offsets): Use it.
+ * reload1.c (set_initial_eh_label_offset): New.
+ (set_initial_label_offsets): Use it.
2004-11-25 Kaz Kojima <kkojima@gcc.gnu.org>
PR tree-optimization/18587
* tree-flow-inline.h (mark_call_clobbered, mark_non_addressable): Flag
call clobbered caches as invalid.
- * tree-ssa-operands.c (ssa_call_clobbered_cache_valid): New. Flag
+ * tree-ssa-operands.c (ssa_call_clobbered_cache_valid): New. Flag
indicating whether the call clobbered operand cache is valid.
(ssa_ro_call_cache_valid): New. Flag indicating whether the
pure/const call operand cache is valid.
- (clobbered_v_may_defs, clobbered_vuses, ro_call_vuses): New. Cached
+ (clobbered_v_may_defs, clobbered_vuses, ro_call_vuses): New. Cached
list of operands for cached call virtual operands.
- (clobbered_aliased_loads, clobbered_aliased_stores,
+ (clobbered_aliased_loads, clobbered_aliased_stores,
ro_call_aliased_load): New. flags caching whether alias bits are
to be set in call stmt's.
(fini_ssa_operands): Remove call operand caches if present.
build array
(finalize_ssa_vuses): Use cleanup_v_may_defs and remove redundant
VUSES by checking the in_v_may_def_list bit.
- (append_v_may_def, append_vuse): Use the in_list bit rather than
+ (append_v_may_def, append_vuse): Use the in_list bit rather than
scanning the array for duplicates.
2004-11-25 Ulrich Weigand <uweigand@de.ibm.com>
* config/i386/i386.c (i386_dwarf_output_addr_const): Likewise.
* config/i386/i386-protos.h (i386_dwarf_output_addr_const):
Likewise.
-
+
2004-11-24 Richard Kenner <kenner@vlsi1.ultra.nyu.edu>
* tree-sra.c (sra_walk_modify_expr): Handle RHS first, then LHS.
* recog.c (recog_memoized_1): Remove.
* recog.h (recog_memoized_1): Remove declaration.
(recog_memoized): Change from macro to inline function.
-
+
2004-11-24 Devang Patel <dpatel@apple.com>
PR/18555
2004-11-24 Devang Patel <dpatel@apple.com>
* gcc.c (process_command): Supply -v to linker.
-
+
2004-11-24 David Edelsohn <edelsohn@gnu.org>
Paolo Bonzini <bonzini@gnu.org>
2004-11-24 Mark Mitchell <mark@codesourcery.com>
- * config/i386/sol2.h (X86_FILE_START_VERSION_DIRECTIVE):
+ * config/i386/sol2.h (X86_FILE_START_VERSION_DIRECTIVE):
Define to false.
2004-11-24 Joseph Myers <joseph@codesourcery.com>
2004-11-24 Steven Bosscher <stevenb@suse.de>
- * expr.c (expand_expr_real_1): Remove cases for EXIT_BLOCK_EXPR
+ * expr.c (expand_expr_real_1): Remove cases for EXIT_BLOCK_EXPR
and LABELED_BLOCK_EXPR.
* gimplify.c (gimplify_labeled_block_expr): Remove.
(gimplify_exit_block_expr): Remove.
(c_initialize_diagnostics): Declare.
* objc/objc-lang.c (LANG_HOOKS_INITIALIZE_DIAGNOSTICS): Define.
* c-format.c (format_type_warning): New function. Improve
- diagnostics for incorrect format argument types.
- (check_format_types): Use it. Add two parameters. Use the
- TYPE_MAIN_VARIANT of wanted_type.
- (check_format_info_main): Pass new parameters to
- check_format_types.
- (struct format_wanted_type): Update comment.
-
-2004-07-01 Nick Clifton <nickc@redhat.com>
-
- * target.h (struct gcc_target): Add new field to struct cxx:
- import_export_class.
- * target-def.h (TARGET_CXX): Initialise the new field.
- (TARGET_CXX_IMPORT_EXPORT_CLASS): Provide a default value for
- the new field.
- * doc/tm.texi: Document the new target hook.
-
-2004-07-01 Paolo Bonzini <bonzini@gnu.org>
-
- * builtins.c (fold_builtin_classify): Fix typo.
-
-2004-07-01 Richard Henderson <rth@redhat.com>
-
- * function.c (identify_blocks, identify_blocks_1): Remove.
- * function.h (identify_blocks): Remove.
- * rtl.h (NOTE_INSN_BLOCK_BEG): Update comment.
+ di\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0_BEG): Update comment.
2004-07-01 Paolo Bonzini <bonzini@gnu.org>
(define_expand "floatdisf2"
[(set (match_operand:SF 0 "gpc_reg_operand" "")
(float:SF (match_operand:DI 1 "gpc_reg_operand" "")))]
- "TARGET_64BIT && TARGET_HARD_FLOAT && TARGET_FPRS"
+ "TARGET_POWERPC64 && TARGET_HARD_FLOAT && TARGET_FPRS"
"
{
+ rtx val = operands[1];
if (!flag_unsafe_math_optimizations)
{
rtx label = gen_label_rtx ();
- emit_insn (gen_floatdisf2_internal2 (operands[1], label));
+ val = gen_reg_rtx (DImode);
+ emit_insn (gen_floatdisf2_internal2 (val, operands[1], label));
emit_label (label);
}
- emit_insn (gen_floatdisf2_internal1 (operands[0], operands[1]));
+ emit_insn (gen_floatdisf2_internal1 (operands[0], val));
DONE;
}")
;; by a bit that won't be lost at that stage, but is below the SFmode
;; rounding position.
(define_expand "floatdisf2_internal2"
- [(parallel [(set (match_dup 4)
- (compare:CC (and:DI (match_operand:DI 0 "" "")
- (const_int 2047))
- (const_int 0)))
- (set (match_dup 2) (and:DI (match_dup 0) (const_int 2047)))
- (clobber (match_scratch:CC 7 ""))])
- (set (match_dup 3) (ashiftrt:DI (match_dup 0) (const_int 53)))
- (set (match_dup 3) (plus:DI (match_dup 3) (const_int 1)))
- (set (pc) (if_then_else (eq (match_dup 4) (const_int 0))
- (label_ref (match_operand:DI 1 "" ""))
- (pc)))
- (set (match_dup 5) (compare:CCUNS (match_dup 3) (const_int 2)))
- (set (pc) (if_then_else (ltu (match_dup 5) (const_int 0))
- (label_ref (match_dup 1))
+ [(set (match_dup 3) (ashiftrt:DI (match_operand:DI 1 "" "")
+ (const_int 53)))
+ (parallel [(set (match_operand:DI 0 "" "") (and:DI (match_dup 1)
+ (const_int 2047)))
+ (clobber (scratch:CC))])
+ (set (match_dup 3) (plus:DI (match_dup 3)
+ (const_int 1)))
+ (set (match_dup 0) (plus:DI (match_dup 0)
+ (const_int 2047)))
+ (set (match_dup 4) (compare:CCUNS (match_dup 3)
+ (const_int 3)))
+ (set (match_dup 0) (ior:DI (match_dup 0)
+ (match_dup 1)))
+ (parallel [(set (match_dup 0) (and:DI (match_dup 0)
+ (const_int -2048)))
+ (clobber (scratch:CC))])
+ (set (pc) (if_then_else (geu (match_dup 4) (const_int 0))
+ (label_ref (match_operand:DI 2 "" ""))
(pc)))
- (set (match_dup 0) (xor:DI (match_dup 0) (match_dup 2)))
- (set (match_dup 0) (ior:DI (match_dup 0) (const_int 2048)))]
- "TARGET_64BIT && TARGET_HARD_FLOAT && TARGET_FPRS"
+ (set (match_dup 0) (match_dup 1))]
+ "TARGET_POWERPC64 && TARGET_HARD_FLOAT && TARGET_FPRS"
"
{
- operands[2] = gen_reg_rtx (DImode);
operands[3] = gen_reg_rtx (DImode);
- operands[4] = gen_reg_rtx (CCmode);
- operands[5] = gen_reg_rtx (CCUNSmode);
+ operands[4] = gen_reg_rtx (CCUNSmode);
}")
\f
;; Define the DImode operations that can be done in a small number
projects / platform / upstream / gcc.git / commitdiff