dm: powerpc: P5040DS: add i2c DM support

This supports i2c DM for board P5040DS

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

diff --git a/arch/powerpc/dts/p5040.dtsi b/arch/powerpc/dts/p5040.dtsi
index 67a62a7..4598857 100644 (file)
--- a/arch/powerpc/dts/p5040.dtsi
+++ b/arch/powerpc/dts/p5040.dtsi
@@ -3,7 +3,7 @@
  * P5040 Silicon/SoC Device Tree Source (pre include)
  *
  * Copyright 2012 - 2015 Freescale Semiconductor Inc.
- * Copyright 2019 NXP
+ * Copyright 2019-2020 NXP
  */
 
 /dts-v1/;
@@ -85,6 +85,9 @@
                        reg = <0x114000 0x1000>;
                        clock-frequency = <0>;
                };
+
+               /include/ "qoriq-i2c-0.dtsi"
+               /include/ "qoriq-i2c-1.dtsi"
        };
 
        pcie@ffe200000 {

diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index b2c86ff..26f534a 100644 (file)
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright 2009-2012 Freescale Semiconductor, Inc.
+ * Copyright 2020 NXP
  */
 
 /*
@@ -276,14 +277,19 @@
 #define CONFIG_SYS_NS16550_COM4        (CONFIG_SYS_CCSRBAR+0x11D600)
 
 /* I2C */
+#ifndef CONFIG_DM_I2C
 #define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
 #define CONFIG_SYS_FSL_I2C_SPEED       400000
 #define CONFIG_SYS_FSL_I2C_SLAVE       0x7F
 #define CONFIG_SYS_FSL_I2C_OFFSET      0x118000
 #define CONFIG_SYS_FSL_I2C2_SPEED      400000
 #define CONFIG_SYS_FSL_I2C2_SLAVE      0x7F
 #define CONFIG_SYS_FSL_I2C2_OFFSET     0x118100
+#else
+#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
+#define CONFIG_I2C_DEFAULT_BUS_NUMBER  0
+#endif
+#define CONFIG_SYS_I2C_FSL
 
 /*
  * RapidIO