gpio: gpio-wcove: fix irq pending status bit width

[ Upstream commit 7c2d176fe3f8dce632b948f79c7e89916ffe2c70 ]

Whiskey cove PMIC has three GPIO banks with total number of 13 GPIO
pins. But when checking for the pending status, for_each_set_bit() uses
bit width of 7 and hence it only checks the status for first 7 GPIO pins
missing to check/clear the status of rest of the GPIO pins. This patch
fixes this issue.

Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/gpio/gpio-wcove.c b/drivers/gpio/gpio-wcove.c
index d0ddba7..1012c86 100644 (file)
--- a/drivers/gpio/gpio-wcove.c
+++ b/drivers/gpio/gpio-wcove.c
@@ -318,7 +318,7 @@ static irqreturn_t wcove_gpio_irq_handler(int irq, void *data)
        while (pending) {
                /* One iteration is for all pending bits */
                for_each_set_bit(gpio, (const unsigned long *)&pending,
-                                                GROUP0_NR_IRQS) {
+                                                WCOVE_GPIO_NUM) {
                        offset = (gpio > GROUP0_NR_IRQS) ? 1 : 0;
                        mask = (offset == 1) ? BIT(gpio - GROUP0_NR_IRQS) :
                                                                BIT(gpio);