lib: sync i915_pciids.h with kernel
authorMatt Roper <matthew.d.roper@intel.com>
Wed, 27 Jul 2022 04:42:50 +0000 (21:42 -0700)
committerMatt Roper <matthew.d.roper@intel.com>
Wed, 3 Aug 2022 22:48:27 +0000 (22:48 +0000)
This synchronizes with kernel commit 7835303982d1 ("drm/i915/mtl: Add
MeteorLake PCI IDs") to bring in the missing PCI IDs for several recent
platforms.

These days adding PCI IDs to libdrm doesn't really matter for real-world
system usage.  However there are still a few driver testing situations
where they're needed (such as the IGT dma-buf tests that still rely on
libdrm's bufmgr code).  At some point we should probably break that
final IGT dependency on libdrm so that these PCI ID resyncs won't be
necessary anymore, but that hasn't happened yet.

References: https://gitlab.freedesktop.org/drm/intel/-/issues/5416
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
intel/i915_pciids.h

index 3301772..278031a 100644 (file)
        INTEL_VGA_DEVICE(0x46C2, info), \
        INTEL_VGA_DEVICE(0x46C3, info)
 
+/* ADL-N */
+#define INTEL_ADLN_IDS(info) \
+       INTEL_VGA_DEVICE(0x46D0, info), \
+       INTEL_VGA_DEVICE(0x46D1, info), \
+       INTEL_VGA_DEVICE(0x46D2, info)
+
+/* RPL-S */
+#define INTEL_RPLS_IDS(info) \
+       INTEL_VGA_DEVICE(0xA780, info), \
+       INTEL_VGA_DEVICE(0xA781, info), \
+       INTEL_VGA_DEVICE(0xA782, info), \
+       INTEL_VGA_DEVICE(0xA783, info), \
+       INTEL_VGA_DEVICE(0xA788, info), \
+       INTEL_VGA_DEVICE(0xA789, info), \
+       INTEL_VGA_DEVICE(0xA78A, info), \
+       INTEL_VGA_DEVICE(0xA78B, info)
+
 /* RPL-P */
 #define INTEL_RPLP_IDS(info) \
        INTEL_VGA_DEVICE(0xA720, info), \
        INTEL_VGA_DEVICE(0xA7A8, info), \
        INTEL_VGA_DEVICE(0xA7A9, info)
 
-/* ADL-N */
-#define INTEL_ADLN_IDS(info) \
-       INTEL_VGA_DEVICE(0x46D0, info), \
-       INTEL_VGA_DEVICE(0x46D1, info), \
-       INTEL_VGA_DEVICE(0x46D2, info)
-
-/* RPL-S */
-#define INTEL_RPLS_IDS(info) \
-        INTEL_VGA_DEVICE(0xA780, info), \
-        INTEL_VGA_DEVICE(0xA781, info), \
-        INTEL_VGA_DEVICE(0xA782, info), \
-        INTEL_VGA_DEVICE(0xA783, info), \
-        INTEL_VGA_DEVICE(0xA788, info), \
-        INTEL_VGA_DEVICE(0xA789, info)
+/* DG2 */
+#define INTEL_DG2_G10_IDS(info) \
+       INTEL_VGA_DEVICE(0x5690, info), \
+       INTEL_VGA_DEVICE(0x5691, info), \
+       INTEL_VGA_DEVICE(0x5692, info), \
+       INTEL_VGA_DEVICE(0x56A0, info), \
+       INTEL_VGA_DEVICE(0x56A1, info), \
+       INTEL_VGA_DEVICE(0x56A2, info)
+
+#define INTEL_DG2_G11_IDS(info) \
+       INTEL_VGA_DEVICE(0x5693, info), \
+       INTEL_VGA_DEVICE(0x5694, info), \
+       INTEL_VGA_DEVICE(0x5695, info), \
+       INTEL_VGA_DEVICE(0x5698, info), \
+       INTEL_VGA_DEVICE(0x56A5, info), \
+       INTEL_VGA_DEVICE(0x56A6, info), \
+       INTEL_VGA_DEVICE(0x56B0, info), \
+       INTEL_VGA_DEVICE(0x56B1, info)
+
+#define INTEL_DG2_G12_IDS(info) \
+       INTEL_VGA_DEVICE(0x5696, info), \
+       INTEL_VGA_DEVICE(0x5697, info), \
+       INTEL_VGA_DEVICE(0x56A3, info), \
+       INTEL_VGA_DEVICE(0x56A4, info), \
+       INTEL_VGA_DEVICE(0x56B2, info), \
+       INTEL_VGA_DEVICE(0x56B3, info)
+
+#define INTEL_DG2_IDS(info) \
+       INTEL_DG2_G10_IDS(info), \
+       INTEL_DG2_G11_IDS(info), \
+       INTEL_DG2_G12_IDS(info)
+
+#define INTEL_ATS_M150_IDS(info) \
+       INTEL_VGA_DEVICE(0x56C0, info)
+
+#define INTEL_ATS_M75_IDS(info) \
+       INTEL_VGA_DEVICE(0x56C1, info)
+
+#define INTEL_ATS_M_IDS(info) \
+       INTEL_ATS_M150_IDS(info), \
+       INTEL_ATS_M75_IDS(info)
+/* MTL */
+#define INTEL_MTL_M_IDS(info) \
+       INTEL_VGA_DEVICE(0x7D40, info), \
+       INTEL_VGA_DEVICE(0x7D60, info)
+
+#define INTEL_MTL_P_IDS(info) \
+       INTEL_VGA_DEVICE(0x7D45, info), \
+       INTEL_VGA_DEVICE(0x7D55, info), \
+       INTEL_VGA_DEVICE(0x7DD5, info)
+
+#define INTEL_MTL_IDS(info) \
+       INTEL_MTL_M_IDS(info), \
+       INTEL_MTL_P_IDS(info)
 
 #endif /* _I915_PCIIDS_H */