*/
static void setChipClock(unsigned int frequency)
{
- pll_value_t pll;
+ struct pll_value pll;
unsigned int ulActualMxClk;
/* Cheok_0509: For SM750LE, the chip clock is fixed. Nothing to set. */
return data;
}
-int ddk750_initHw(initchip_param_t *pInitParam)
+int ddk750_initHw(struct initchip_param *pInitParam)
{
unsigned int reg;
* M = {1,...,255}
* N = {2,...,15}
*/
-unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll)
+unsigned int calcPllValue(unsigned int request_orig, struct pll_value *pll)
{
/* as sm750 register definition,
* N located in 2,15 and M located in 1,255
return ret;
}
-unsigned int formatPllReg(pll_value_t *pPLL)
+unsigned int formatPllReg(struct pll_value *pPLL)
{
#ifndef VALIDATION_CHIP
unsigned int POD = pPLL->POD;
}
clock_type_t;
-typedef struct _pll_value_t {
+struct pll_value {
clock_type_t clockType;
unsigned long inputFreq; /* Input clock frequency to the PLL */
unsigned long N;
unsigned long OD;
unsigned long POD;
-}
-pll_value_t;
+};
/* input struct to initChipParam() function */
-typedef struct _initchip_param_t {
+struct initchip_param {
unsigned short powerMode; /* Use power mode 0 or 1 */
unsigned short chipClock; /**
* Speed of main chip clock in MHz unit
*/
/* More initialization parameter can be added if needed */
-}
-initchip_param_t;
+};
logical_chip_type_t sm750_get_chip_type(void);
-unsigned int calcPllValue(unsigned int request, pll_value_t *pll);
-unsigned int formatPllReg(pll_value_t *pPLL);
+unsigned int calcPllValue(unsigned int request, struct pll_value *pll);
+unsigned int formatPllReg(struct pll_value *pPLL);
void ddk750_set_mmio(void __iomem *, unsigned short, char);
unsigned int ddk750_getVMSize(void);
-int ddk750_initHw(initchip_param_t *);
+int ddk750_initHw(struct initchip_param *);
#endif
/* only timing related registers will be programed */
-static int programModeRegisters(mode_parameter_t *pModeParam, pll_value_t *pll)
+static int programModeRegisters(mode_parameter_t *pModeParam,
+ struct pll_value *pll)
{
int ret = 0;
int cnt = 0;
int ddk750_setModeTiming(mode_parameter_t *parm, clock_type_t clock)
{
- pll_value_t pll;
+ struct pll_value pll;
unsigned int uiActualPixelClk;
pll.inputFreq = DEFAULT_INPUT_CLOCK;
if (parm->master_clk == 0)
parm->master_clk = parm->chip_clk / 3;
- ddk750_initHw((initchip_param_t *)&sm750_dev->initParm);
+ ddk750_initHw((struct initchip_param *)&sm750_dev->initParm);
/* for sm718, open pci burst */
if (sm750_dev->devid == 0x718) {
POKE32(SYSTEM_CTRL,