Fix reliance on lax vector conversions in tests for x86 intrinsics.

llvm-svn: 372062

diff --git a/clang/test/CodeGen/const-init.c b/clang/test/CodeGen/const-init.c
index 41ac8f2..374aa00 100644 (file)
--- a/clang/test/CodeGen/const-init.c
+++ b/clang/test/CodeGen/const-init.c
@@ -141,8 +141,8 @@ void g28() {
   // CHECK: @g28.b = internal global <12 x i16> <i16 0, i16 0, i16 0, i16 -32768, i16 16383, i16 0, i16 0, i16 0, i16 0, i16 -32768, i16 16384, i16 0>
   // CHECK: @g28.c = internal global <2 x x86_fp80> <x86_fp80 0xK3FFF8000000000000000, x86_fp80 0xK40008000000000000000>, align 32
   static v1i64 a = (v1i64)10LL;
-  static v12i16 b = (v2f80){1,2};
-  static v2f80 c = (v12i16){0,0,0,-32768,16383,0,0,0,0,-32768,16384,0};
+  static v12i16 b = (v12i16)(v2f80){1,2};
+  static v2f80 c = (v2f80)(v12i16){0,0,0,-32768,16383,0,0,0,0,-32768,16384,0};
 }
 
 // PR13643

diff --git a/clang/test/CodeGen/ppc-smmintrin.c b/clang/test/CodeGen/ppc-smmintrin.c
index e116562..666bc0f 100644 (file)
--- a/clang/test/CodeGen/ppc-smmintrin.c
+++ b/clang/test/CodeGen/ppc-smmintrin.c
@@ -15,7 +15,7 @@ test_extract() {
   _mm_extract_epi8(mi, 0);
   _mm_extract_epi32(mi, 0);
   _mm_extract_epi64(mi, 0);
-  _mm_extract_ps(mi, 0);
+  _mm_extract_ps((__m128)mi, 0);
 }
 
 // CHECK-LABEL: @test_extract

diff --git a/clang/test/CodeGen/sse-builtins.c b/clang/test/CodeGen/sse-builtins.c
index b68a714..3891c07 100644 (file)
--- a/clang/test/CodeGen/sse-builtins.c
+++ b/clang/test/CodeGen/sse-builtins.c
@@ -714,7 +714,7 @@ void test_mm_storeu_ps(float* x,  __m128 y) {
   _mm_storeu_ps(x, y);
 }
 
-void test_mm_stream_ps(float*A, __m128d B) {
+void test_mm_stream_ps(float*A, __m128 B) {
   // CHECK-LABEL: test_mm_stream_ps
   // CHECK: store <4 x float> %{{.*}}, <4 x float>* %{{.*}}, align 16, !nontemporal
   _mm_stream_ps(A, B);

diff --git a/clang/test/CodeGen/sse.c b/clang/test/CodeGen/sse.c
index 1191f55..a75b8dc 100644 (file)
--- a/clang/test/CodeGen/sse.c
+++ b/clang/test/CodeGen/sse.c
@@ -5,37 +5,37 @@
 #include <emmintrin.h>
 
 // Byte-shifts look reversed due to xmm register layout
-__m128 test_mm_slli_si128(__m128 a) {
+__m128i test_mm_slli_si128(__m128i a) {
   // CHECK-LABEL: @test_mm_slli_si128
   // CHECK: shufflevector <16 x i8> <{{.*}}, i8 0, i8 0, i8 0, i8 0, i8 0>, <16 x i8> {{.*}}, <16 x i32> <i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26>
   return _mm_slli_si128(a, 5);
 }
 
-__m128 test_mm_slli_si128_0(__m128 a) {
+__m128i test_mm_slli_si128_0(__m128i a) {
   // CHECK-LABEL: @test_mm_slli_si128_0
   // CHECK-NOT: shufflevector
   return _mm_slli_si128(a, 0);
 }
 
-__m128 test_mm_slli_si128_16(__m128 a) {
+__m128i test_mm_slli_si128_16(__m128i a) {
   // CHECK-LABEL: @test_mm_slli_si128_16
   // CHECK-NOT: shufflevector
   return _mm_slli_si128(a, 16);
 }
 
-__m128 test_mm_srli_si128(__m128 a) {
+__m128i test_mm_srli_si128(__m128i a) {
   // CHECK-LABEL: @test_mm_srli_si128
   // CHECK: shufflevector <16 x i8> {{.*}}, <16 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0, {{.*}}>, <16 x i32> <i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20>
   return _mm_srli_si128(a, 5);
 }
 
-__m128 test_mm_srli_si128_0(__m128 a) {
+__m128i test_mm_srli_si128_0(__m128i a) {
   // CHECK-LABEL: @test_mm_srli_si128_0
   // CHECK-NOT: shufflevector
   return _mm_srli_si128(a, 0);
 }
 
-__m128 test_mm_srli_si128_16(__m128 a) {
+__m128i test_mm_srli_si128_16(__m128i a) {
   // CHECK-LABEL: @test_mm_srli_si128_16
   // CHECK-NOT: shufflevector
   return _mm_srli_si128(a, 16);

diff --git a/clang/test/CodeGen/target-builtin-error.c b/clang/test/CodeGen/target-builtin-error.c
index ee41277..4e44b72 100644 (file)
--- a/clang/test/CodeGen/target-builtin-error.c
+++ b/clang/test/CodeGen/target-builtin-error.c
@@ -3,6 +3,6 @@
 
 #include <x86intrin.h>
 
-__m128d foo(__m128d a, __m128d b) {
+__m128 foo(__m128 a, __m128 b) {
   return __builtin_ia32_addsubps(b, a); // expected-error {{'__builtin_ia32_addsubps' needs target feature sse3}}
 }

diff --git a/clang/test/CodeGen/x86-builtins-vector-width.c b/clang/test/CodeGen/x86-builtins-vector-width.c
index 62f5929..dca3e58 100644 (file)
--- a/clang/test/CodeGen/x86-builtins-vector-width.c
+++ b/clang/test/CodeGen/x86-builtins-vector-width.c
@@ -1,7 +1,7 @@
 // RUN: %clang_cc1 -triple i686-linux-gnu -target-cpu i686 -emit-llvm %s -o - | FileCheck %s
 
-typedef signed long long V2LLi __attribute__((vector_size(16)));
-typedef signed long long V4LLi __attribute__((vector_size(32)));
+typedef double V2LLi __attribute__((vector_size(16)));
+typedef double V4LLi __attribute__((vector_size(32)));
 
 // Make sure builtin forces a min-legal-width attribute
 void foo(void) {

diff --git a/clang/test/Headers/xmmintrin.c b/clang/test/Headers/xmmintrin.c
index c617504..9b8993e 100644 (file)
--- a/clang/test/Headers/xmmintrin.c
+++ b/clang/test/Headers/xmmintrin.c
@@ -22,7 +22,7 @@ __m64 test_mm_cvtps_pi16(__m128 a) {
 
 // Make sure that including <xmmintrin.h> also makes <emmintrin.h>'s content available.
 // This is an ugly hack for GCC compatibility.
-__m128 test_xmmintrin_provides_emmintrin(__m128d __a, __m128d __b) {
+__m128d test_xmmintrin_provides_emmintrin(__m128d __a, __m128d __b) {
   return _mm_add_sd(__a, __b);
 }
 

diff --git a/clang/test/Sema/builtins-x86.c b/clang/test/Sema/builtins-x86.c
index dca0bdc..a00044f 100644 (file)
--- a/clang/test/Sema/builtins-x86.c
+++ b/clang/test/Sema/builtins-x86.c
@@ -37,7 +37,7 @@ __m128d test__builtin_ia32_cmpsd(__m128d __a, __m128d __b) {
   return __builtin_ia32_cmpsd(__a, __b, 32); // expected-error {{argument value 32 is outside the valid range [0, 31]}}
 }
 
-__mmask16 test__builtin_ia32_cmpps512_mask(__m512d __a, __m512d __b) {
+__mmask16 test__builtin_ia32_cmpps512_mask(__m512 __a, __m512 __b) {
   return __builtin_ia32_cmpps512_mask(__a, __b, 32, -1, 4); // expected-error {{argument value 32 is outside the valid range [0, 31]}}
 }