add Milk-V Meles board

Signed-off-by: Haaland Chen <haaland@milkv.io>

diff --git a/arch/riscv/dts/Makefile b/arch/riscv/dts/Makefile
index 69c7787f2c5266be33784eef3b7af0e56c9a5e5f..d2ff046af15f3fe69e59d378c326469e10ce591f 100644 (file)
--- a/arch/riscv/dts/Makefile
+++ b/arch/riscv/dts/Makefile
@@ -5,7 +5,7 @@ dtb-$(CONFIG_TARGET_SIFIVE_FU540) += hifive-unleashed-a00.dtb
 dtb-$(CONFIG_TARGET_ICE_C910) += ice-c910.dtb
 dtb-$(CONFIG_TARGET_LIGHT_EVB_MPW_C910) += light-evb-mpw-c910.dtb
 dtb-$(CONFIG_TARGET_LIGHT_FPGA_FM_C910) += light-fpga-fm-c910.dtb
-dtb-$(CONFIG_TARGET_LIGHT_C910) += light-a-ref.dtb light-b-ref.dtb light-a-val.dtb light-b-product.dtb light-a-product.dtb light-ant-ref.dtb light-beagle.dtb light-b-power.dtb light-lpi4a.dtb
+dtb-$(CONFIG_TARGET_LIGHT_C910) += light-a-ref.dtb light-b-ref.dtb light-a-val.dtb light-b-product.dtb light-a-product.dtb light-ant-ref.dtb light-beagle.dtb light-b-power.dtb light-lpi4a.dtb light-milkv-meles.dtb
 
 targets += $(dtb-y)
 

diff --git a/arch/riscv/dts/light-milkv-meles.dts b/arch/riscv/dts/light-milkv-meles.dts
new file mode 100644 (file)
index 0000000..006eb00
--- /dev/null
+++ b/arch/riscv/dts/light-milkv-meles.dts
@@ -0,0 +1,284 @@
+/dts-v1/;
+/ {
+       model = "Milk-V Meles";
+       compatible = "milkv,meles", "thead,c910_light";
+       #address-cells = <2>;
+       #size-cells = <2>;
+
+       memory@0 {
+               device_type = "memory";
+               reg = <0x0 0xc0000000 0x0 0x40000000>;
+       };
+
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               timebase-frequency = <3000000>;
+               u-boot,dm-pre-reloc;
+               cpu@0 {
+                       device_type = "cpu";
+                       reg = <0>;
+                       status = "okay";
+                       compatible = "riscv";
+                       riscv,isa = "rv64imafdcvsu";
+                       mmu-type = "riscv,sv39";
+                       u-boot,dm-pre-reloc;
+               };
+       };
+
+       soc {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               compatible = "simple-bus";
+               ranges;
+               u-boot,dm-pre-reloc;
+
+               intc: interrupt-controller@ffd8000000 {
+                       compatible = "riscv,plic0";
+                       reg = <0xff 0xd8000000 0x0 0x04000000>;
+                       status = "disabled";
+               };
+
+               dummy_apb: apb-clock {
+                       compatible = "fixed-clock";
+                       clock-frequency = <62500000>;
+                       clock-output-names = "dummy_apb";
+                       #clock-cells = <0>;
+                       u-boot,dm-pre-reloc;
+               };
+
+               dummy_ahb: ahb-clock {
+                       compatible = "fixed-clock";
+                       clock-frequency = <250000000>;
+                       clock-output-names = "core";
+                       #clock-cells = <0>;
+                       u-boot,dm-pre-reloc;
+               };
+
+               dummy_spi: spi-clock {
+                       compatible = "fixed-clock";
+                       clock-frequency = <396000000>;
+                       clock-output-names = "dummy_spi";
+                       #clock-cells = <0>;
+                       u-boot,dm-pre-reloc;
+               };
+
+               dummy_qspi0: qspi0-clock {
+                       compatible = "fixed-clock";
+                       clock-frequency = <792000000>;
+                       clock-output-names = "dummy_qspi0";
+                       #clock-cells = <0>;
+                       u-boot,dm-pre-reloc;
+               };
+
+               dummy_uart_sclk: uart-sclk-clock {
+                       compatible = "fixed-clock";
+                       clock-frequency = <100000000>;
+                       clock-output-names = "dummy_uart_sclk";
+                       #clock-cells = <0>;
+                       u-boot,dm-pre-reloc;
+               };
+
+               dummy_i2c_icclk: i2c-icclk-clock {
+                       compatible = "fixed-clock";
+                       clock-frequency = <50000000>;
+                       clock-output-names = "dummy_i2c_icclk";
+                       #clock-cells = <0>;
+                       u-boot,dm-pre-reloc;
+               };
+
+               dummy_dpu_pixclk: dpu-pix-clock {
+                       compatible = "fixed-clock";
+                       clock-frequency = <74250000>;
+                       clock-output-names = "dummy_dpu_pixclk";
+                       #clock-cells = <0>;
+                       u-boot,dm-pre-reloc;
+               };
+
+               dummy_dphy_refclk: dphy-ref-clock {
+                       compatible = "fixed-clock";
+                       clock-frequency = <24000000>;
+                       clock-output-names = "dummy_dpu_refclk";
+                       #clock-cells = <0>;
+                       u-boot,dm-pre-reloc;
+               };
+
+               serial@ffe7014000 {
+                       compatible = "snps,dw-apb-uart";
+                       reg = <0xff 0xe7014000 0x0 0x400>;
+                       clocks = <&dummy_uart_sclk>;
+                       clock-frequency = <100000000>;
+                       clock-names = "baudclk";
+                       reg-shift = <2>;
+                       reg-io-width = <4>;
+                       u-boot,dm-pre-reloc;
+               };
+
+               gmac0: ethernet@ffe7070000 {
+                       compatible = "snps,dwmac";
+                       reg = <0xff 0xe7070000 0x0 0x2000>;
+                       clocks = <&dummy_apb>;
+                       clock-names = "stmmaceth";
+                       snps,pbl = <32>;
+                       snps,fixed-burst;
+
+                       phy-mode = "rgmii-id";
+                       phy-handle = <&phy_88E1111_a>;
+                       status = "okay";
+                       mdio0 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               compatible = "snps,dwmac-mdio";
+
+                               phy_88E1111_a: ethernet-phy@1 {
+                                       reg = <0x1>;
+                               };
+                       };
+               };
+
+               emmc: sdhci@ffe7080000 {
+                       compatible = "snps,dwcmshc-sdhci";
+                       reg = <0xff 0xe7080000 0x0 0x10000>;
+                       index = <0x0>;
+                       clocks = <&dummy_ahb>;
+                       clock-frequency = <198000000>;
+                       clock-names = "core";
+                       max-frequency = <198000000>;
+                       sdhci-caps-mask = <0x0 0x1000000>;
+                       mmc-hs400-1_8v;
+                       non-removable;
+                       no-sdio;
+                       no-sd;
+                       bus-width = <8>;
+                       voltage= "1.8v";
+                       pull_up;
+                       io_fixed_1v8;
+                       fifo-mode;
+                       u-boot,dm-pre-reloc;
+               };
+
+               sdhci0: sd@ffe7090000 {
+                       compatible = "snps,dwcmshc-sdhci";
+                       reg = <0xff 0xe7090000 0x0 0x10000>;
+                       index = <0x1>;
+                       clocks = <&dummy_ahb>;
+                       clock-frequency = <198000000>;
+                       max-frequency = <198000000>;
+                       sd-uhs-sdr104;
+                       pull_up;
+                       clock-names = "core";
+                       bus-width = <4>;
+                       voltage= "3.3v";
+               };
+
+               gpio2: gpio@ffe7f34000 {
+                       compatible = "snps,dw-apb-gpio";
+                       reg = <0xff 0xe7f34000 0x0 0x1000>;
+                       clocks = <&dummy_apb>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       gpio2_porta: gpio-controller@0 {
+                               compatible = "snps,dw-apb-gpio-port";
+                               gpio-controller;
+                               #gpio-cells = <2>;
+                               snps,nr-gpios = <32>;
+                               reg = <0>;
+                       };
+               };
+
+               gpio0: gpio@ffec005000 {
+                       compatible = "snps,dw-apb-gpio";
+                       reg = <0xff 0xec005000 0x0 0x1000>;
+                       clocks = <&dummy_apb>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       gpio0_porta: gpio-controller@0 {
+                               compatible = "snps,dw-apb-gpio-port";
+                               gpio-controller;
+                               #gpio-cells = <2>;
+                               snps,nr-gpios = <32>;
+                               reg = <0>;
+                       };
+               };
+
+               gpio1: gpio@ffec006000 {
+                       compatible = "snps,dw-apb-gpio";
+                       reg = <0xff 0xec006000 0x0 0x1000>;
+                       clocks = <&dummy_apb>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       gpio1_porta: gpio-controller@0 {
+                               compatible = "snps,dw-apb-gpio-port";
+                               gpio-controller;
+                               #gpio-cells = <2>;
+                               snps,nr-gpios = <32>;
+                               reg = <0>;
+                       };
+               };
+
+               axiscr {
+                       compatible = "thead,axiscr";
+                       reg = <0xff 0xff004000 0x0 0x1000>;
+                       lock-read = "okay";
+                       lock-write = "okay";
+                       #address-cells = <2>;
+                       #size-cells = <2>;
+                       u-boot,dm-pre-reloc;
+                       axiscr0: axisrc@0 {
+                               device_type = "axiscr";
+                               region = <0x00 0x00000000 0x00 0x80000000>; // 4KB align
+                               status = "disabled";
+                               #address-cells = <2>;
+                               #size-cells = <2>;
+                               u-boot,dm-pre-reloc;
+                       };
+                       axiscr1: axisrc@1 {
+                               device_type = "axiscr";
+                               region = <0x00 0x80000000 0x00 0x80000000>; // 4KB align
+                               status = "disabled";
+                               #address-cells = <2>;
+                               #size-cells = <2>;
+                               u-boot,dm-pre-reloc;
+                       };
+                       axiscr2: axisrc@2 {
+                               device_type = "axiscr";
+                               region = <0x01 0x00000000 0x00 0x80000000>; // 4KB align
+                               status = "disabled";
+                               #address-cells = <2>;
+                               #size-cells = <2>;
+                               u-boot,dm-pre-reloc;
+                       };
+               };
+
+               axiparity {
+                       compatible = "thead,axiparity";
+                       reg = <0xff 0xff00c000 0x0 0x1000>;
+                       lock = "okay";
+                       #address-cells = <2>;
+                       #size-cells = <2>;
+                       u-boot,dm-pre-reloc;
+                       axiparity0: axiparity@0 {
+                               device_type = "axiparity";
+                               region = <0x00 0x00000000 0x01 0x0000000>; // 4KB align
+                               status = "disabled";
+                               #address-cells = <2>;
+                               #size-cells = <2>;
+                               u-boot,dm-pre-reloc;
+                       };
+                       axiparity1: axiparity@1 {
+                               device_type = "axiparity";
+                               region = <0x01 0x00000000 0x01 0x00000000>; // 4KB align
+                               status = "disabled";
+                               #address-cells = <2>;
+                               #size-cells = <2>;
+                               u-boot,dm-pre-reloc;
+                       };
+               };
+       };
+
+       chosen {
+               bootargs = "console=ttyS0,115200";
+               stdout-path = "/soc/serial@ffe7014000:115200";
+       };
+};

diff --git a/board/thead/light-c910/Kconfig b/board/thead/light-c910/Kconfig
index 5dd65f43a0302a42134a065aa20f5c418810c179..abac54f35387514e37c7f6a92e89ab65eba54d49 100644 (file)
--- a/board/thead/light-c910/Kconfig
+++ b/board/thead/light-c910/Kconfig
@@ -126,6 +126,10 @@ config TARGET_LIGHT_FM_C910_B_POWER
     bool "light fullmask for light-b-power board "
     default n
 
+config TARGET_LIGHT_FM_C910_MILKV_MELES
+    bool "light fullmask for Milk-V Meles board "
+    default n
+
 config SYS_TEXT_BASE
     default 0xc0000000 if RISCV_MMODE
     default 0x00200000 if RISCV_SMODE

diff --git a/board/thead/light-c910/clock_config.c b/board/thead/light-c910/clock_config.c
index 50036fb4233514a717535af932a09087076fe0c3..f3ea3836a491d4d5973d055954e0b1a6aa6d272c 100644 (file)
--- a/board/thead/light-c910/clock_config.c
+++ b/board/thead/light-c910/clock_config.c
@@ -1146,7 +1146,7 @@ void ap_mipi_dsi1_clk_endisable(bool en)
        writel(cfg1, (void __iomem *)AP_DPU1_PLL_CFG1);
 }
 
-#if defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_DISCRETE) || defined (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_POWER) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_B) || defined (CONFIG_TARGET_LIGHT_FM_C910_LPI4A)
+#if defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_DISCRETE) || defined (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_POWER) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_B) || defined (CONFIG_TARGET_LIGHT_FM_C910_LPI4A) || defined (CONFIG_TARGET_LIGHT_FM_C910_MILKV_MELES)
 static void ap_multimedia_div_num_set(enum multimedia_div_type type, unsigned int div_num)
 {
        unsigned long div_reg;
@@ -1304,7 +1304,7 @@ int clk_config(void)
 
        /* The boards other than the LightA board perform the bus down-speed operation */
 
-#if defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_DISCRETE) || defined (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_POWER) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_B) || defined (CONFIG_TARGET_LIGHT_FM_C910_LPI4A)
+#if defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_DISCRETE) || defined (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_POWER) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_B) || defined (CONFIG_TARGET_LIGHT_FM_C910_LPI4A) || defined (CONFIG_TARGET_LIGHT_FM_C910_MILKV_MELES)
        ap_multimedia_div_num_set(VI_MIPI_CSI0_DIV, 12); /* Input frquency: 2376MHZ */
        ap_multimedia_div_num_set(VI_ISP0_CORE_DIV, 15); /* Input frquency: 2376MHZ */
        ap_multimedia_div_num_set(VI_ISP1_CORE_DIV, 12); /* Input frquency: 2376MHZ */

diff --git a/board/thead/light-c910/light.c b/board/thead/light-c910/light.c
index 1fa88a891e6ec6204e2bfa6abe04db40abfd2b44..2ce5b5f4b558ee1e4ea1c333a3b0a2fa1697fb92 100644 (file)
--- a/board/thead/light-c910/light.c
+++ b/board/thead/light-c910/light.c
@@ -2048,6 +2048,205 @@ static void light_iopin_init(void)
 
 }
 
+#elif defined (CONFIG_TARGET_LIGHT_FM_C910_MILKV_MELES)
+static void light_iopin_init(void)
+{
+       /* aon-padmux config */
+       light_pin_cfg(I2C_AON_SCL,PIN_SPEED_NORMAL,PIN_PN,8);
+       light_pin_cfg(I2C_AON_SDA,PIN_SPEED_NORMAL,PIN_PN,8);
+       light_pin_cfg(AOGPIO_7,PIN_SPEED_NORMAL,PIN_PN,2);     ///NC
+       light_pin_cfg(AOGPIO_8,PIN_SPEED_NORMAL,PIN_PN,2);     ///NC
+       light_pin_cfg(AOGPIO_9,PIN_SPEED_NORMAL,PIN_PN,2);
+       light_pin_cfg(AOGPIO_10,PIN_SPEED_NORMAL,PIN_PN,2);
+       light_pin_cfg(AOGPIO_11,PIN_SPEED_NORMAL,PIN_PN,2);
+       light_pin_cfg(AOGPIO_14,PIN_SPEED_NORMAL,PIN_PN,2);
+       light_pin_cfg(AOGPIO_15,PIN_SPEED_NORMAL,PIN_PN,2);
+       light_pin_mux(AOGPIO_7,3);
+       light_pin_mux(AOGPIO_8,3);
+       light_pin_mux(AOGPIO_9,3);
+       light_pin_mux(AOGPIO_10,3);
+       light_pin_mux(AOGPIO_11,0);
+       light_pin_mux(AOGPIO_12,1);
+       light_pin_mux(AOGPIO_13,1);
+       light_pin_mux(AOGPIO_14,0);
+       light_pin_mux(AOGPIO_15,0);
+
+       light_pin_mux(AUDIO_PA9,3);                         ///AUDIO-PA-RESET
+       light_pin_cfg(AUDIO_PA9,PIN_SPEED_NORMAL,PIN_PN,2);
+       light_pin_mux(AUDIO_PA10,3);                        /// AUD-3V3-EN
+       light_pin_cfg(AUDIO_PA10,PIN_SPEED_NORMAL,PIN_PU,2);
+       light_pin_mux(AUDIO_PA12,3);                        /// AUD-1V8-EN
+       light_pin_cfg(AUDIO_PA12,PIN_SPEED_NORMAL,PIN_PU,2);
+       light_pin_mux(AUDIO_PA13,0);
+
+       /*ap-padmux on left/top */
+       light_pin_mux(QSPI1_CSN0,3);
+       light_pin_mux(QSPI1_D2_WP,1);
+       light_pin_cfg(QSPI1_CSN0,PIN_SPEED_NORMAL,PIN_PN,8);  ///se-spi
+       light_pin_cfg(QSPI1_SCLK,PIN_SPEED_NORMAL,PIN_PN,8);  ///se-spi
+       light_pin_cfg(QSPI1_D0_MOSI,PIN_SPEED_NORMAL,PIN_PU,8);  ///se-spi
+       light_pin_cfg(QSPI1_D1_MISO,PIN_SPEED_NORMAL,PIN_PU,8);  ///se-spi
+       light_pin_cfg(QSPI1_D2_WP,PIN_SPEED_NORMAL,PIN_PN,0xF);  ///PWM5
+       light_pin_cfg(QSPI1_D3_HOLD,PIN_SPEED_NORMAL,PIN_PN,8);  ///NC
+
+       light_pin_mux(I2C0_SCL,3);
+       light_pin_mux(I2C0_SDA,3);
+
+       light_pin_cfg(I2C0_SCL,PIN_SPEED_NORMAL,PIN_PU,4);
+       light_pin_cfg(I2C0_SDA,PIN_SPEED_NORMAL,PIN_PN,4);
+       light_pin_cfg(I2C1_SCL,PIN_SPEED_NORMAL,PIN_PN,4);
+       light_pin_cfg(I2C1_SDA,PIN_SPEED_NORMAL,PIN_PN,4);
+
+       light_pin_mux(UART3_TXD,1);
+       light_pin_mux(UART3_RXD,1);
+       light_pin_cfg(UART3_TXD,PIN_SPEED_NORMAL,PIN_PN,2);
+       light_pin_cfg(UART3_RXD,PIN_SPEED_NORMAL,PIN_PN,2);
+
+       light_pin_mux(GPIO0_18,1);
+       light_pin_mux(GPIO0_19,1);
+       light_pin_cfg(GPIO0_18,PIN_SPEED_NORMAL,PIN_PN,4);
+       light_pin_cfg(GPIO0_19,PIN_SPEED_NORMAL,PIN_PN,4);
+
+       light_pin_mux(GPIO0_20,0);
+       light_pin_mux(GPIO0_21,0);
+       light_pin_mux(GPIO0_22,1);
+       light_pin_mux(GPIO0_23,1);
+       light_pin_mux(GPIO0_24,1);
+       light_pin_mux(GPIO0_25,1);
+       light_pin_mux(GPIO0_26,1);
+       light_pin_mux(GPIO0_27,0);
+       light_pin_mux(GPIO0_28,0);
+       light_pin_mux(GPIO0_29,0);
+       light_pin_mux(GPIO0_30,0);
+       light_pin_cfg(GPIO0_20,PIN_SPEED_NORMAL,PIN_PN,2);
+       light_pin_cfg(GPIO0_21,PIN_SPEED_NORMAL,PIN_PN,2);
+       light_pin_cfg(GPIO0_27,PIN_SPEED_NORMAL,PIN_PN,2);                          ///< NC(not used)
+       light_pin_cfg(GPIO0_28,PIN_SPEED_NORMAL,PIN_PN,2);                          ///< AVDD25_IR_EN
+       light_pin_cfg(GPIO0_29,PIN_SPEED_NORMAL,PIN_PN,2);                          ///< DVDD12_IR_EN
+       light_pin_cfg(GPIO0_30,PIN_SPEED_NORMAL,PIN_PU,2);                          ///< gmac,uart,led
+
+       light_pin_mux(GPIO1_0,1);
+       light_pin_mux(GPIO1_1,1);
+       light_pin_mux(GPIO1_2,1);
+       light_pin_mux(GPIO1_3,1);
+       light_pin_mux(GPIO1_4,1);
+       light_pin_mux(GPIO1_9,0);
+       light_pin_mux(GPIO1_10,0);
+       light_pin_mux(GPIO1_11,0);
+       light_pin_mux(GPIO1_12,0);
+       light_pin_mux(GPIO1_13,0);
+       light_pin_mux(GPIO1_14,0);
+       light_pin_mux(GPIO1_15,0);
+       light_pin_mux(GPIO1_16,0);
+       light_pin_mux(GPIO1_21,3);
+       light_pin_mux(GPIO1_22,3);
+       light_pin_mux(GPIO1_23,3);
+       light_pin_mux(GPIO1_24,3);
+       light_pin_mux(GPIO1_25,3);
+       light_pin_cfg(GPIO1_0,PIN_SPEED_NORMAL,PIN_PN,2);
+       light_pin_cfg(GPIO1_1,PIN_SPEED_NORMAL,PIN_PN,2);
+       light_pin_cfg(GPIO1_2,PIN_SPEED_NORMAL,PIN_PN,2);
+       light_pin_cfg(GPIO1_3,PIN_SPEED_NORMAL,PIN_PN,2);
+       light_pin_cfg(GPIO1_4,PIN_SPEED_NORMAL,PIN_PN,2);
+       light_pin_cfg(GPIO1_9,PIN_SPEED_NORMAL,PIN_PN,2);                          ///<VDD18_LCD0_EN
+       light_pin_cfg(GPIO1_10,PIN_SPEED_NORMAL,PIN_PN,2);                         ///<LCD0_BIAS_EN
+       light_pin_cfg(GPIO1_11,PIN_SPEED_NORMAL,PIN_PN,2);
+       light_pin_cfg(GPIO1_12,PIN_SPEED_NORMAL,PIN_PN,2);                         ///<TOUCH-PANNEL VDD28_TP0_EN
+       light_pin_cfg(GPIO1_13,PIN_SPEED_NORMAL,PIN_PN,2);                         ///<DOVDD18_RGB_EN
+       light_pin_cfg(GPIO1_14,PIN_SPEED_NORMAL,PIN_PN,2);                         ///<DVDD12_RGB_EN
+       light_pin_cfg(GPIO1_15,PIN_SPEED_NORMAL,PIN_PN,2);                         ///<AVDD28_RGB_EN
+       light_pin_cfg(GPIO1_16,PIN_SPEED_NORMAL,PIN_PN,2);
+       light_pin_cfg(GPIO1_21,PIN_SPEED_NORMAL,PIN_PN,2);
+       light_pin_cfg(GPIO1_22,PIN_SPEED_NORMAL,PIN_PN,2);
+       light_pin_cfg(GPIO1_23,PIN_SPEED_NORMAL,PIN_PN,2);                         ///<LED_PDN
+       light_pin_cfg(GPIO1_24,PIN_SPEED_NORMAL,PIN_PN,2);
+       light_pin_cfg(GPIO1_25,PIN_SPEED_NORMAL,PIN_PN,2);
+       light_pin_cfg(GPIO1_26,PIN_SPEED_NORMAL,PIN_PN,2);                         ///<DBB2LEDDRIVER_EN
+
+       light_pin_mux(CLK_OUT_0,1);
+       light_pin_mux(CLK_OUT_1,1);
+       light_pin_mux(CLK_OUT_3,1);
+       light_pin_mux(CLK_OUT_2,3);
+       light_pin_cfg(CLK_OUT_2,PIN_SPEED_NORMAL,PIN_PU,2);                        ///volume key "-"
+
+       /*ap-pdmux on righ/top*/
+       light_pin_mux(QSPI0_SCLK,3);            ///NC
+       light_pin_mux(QSPI0_CSN0,3);            ///NC
+       light_pin_mux(QSPI0_CSN1,3);            ///NC
+       light_pin_mux(QSPI0_D0_MOSI,3);         ///NC
+       light_pin_mux(QSPI0_D1_MISO,3);         ///NC
+       light_pin_mux(QSPI0_D2_WP,3);           ///NC
+       light_pin_mux(QSPI0_D3_HOLD,3);         ///NC
+
+       light_pin_cfg(I2C2_SCL,PIN_SPEED_NORMAL,PIN_PN,4);
+       light_pin_cfg(I2C2_SDA,PIN_SPEED_NORMAL,PIN_PN,4);
+       light_pin_cfg(I2C3_SCL,PIN_SPEED_NORMAL,PIN_PN,4);
+       light_pin_cfg(I2C3_SDA,PIN_SPEED_NORMAL,PIN_PN,4);
+
+       light_pin_mux(SPI_CSN,3);                                                /// W_DISABLE_CATE1
+       light_pin_mux(SPI_MOSI,3);                                               /// NC
+       light_pin_mux(SPI_MISO,3);                                               /// RERST1_N_CAT1
+       light_pin_mux(SPI_SCLK,3);
+       light_pin_cfg(SPI_SCLK,PIN_SPEED_NORMAL,PIN_PN,2);                       /// NC
+
+       light_pin_mux(GPIO2_18,0);
+       light_pin_mux(GPIO2_19,0);
+       light_pin_mux(GPIO2_20,0);
+       light_pin_mux(GPIO2_21,0);
+       light_pin_mux(GPIO2_22,0);
+       light_pin_mux(GPIO2_23,0);
+       light_pin_mux(GPIO2_24,0);
+       light_pin_mux(GPIO2_25,0);
+
+       light_pin_cfg(GPIO2_18,PIN_SPEED_NORMAL,PIN_PN,2);
+       light_pin_cfg(GPIO2_19,PIN_SPEED_NORMAL,PIN_PN,2);
+       light_pin_cfg(GPIO2_20,PIN_SPEED_NORMAL,PIN_PN,2);
+       light_pin_cfg(GPIO2_21,PIN_SPEED_NORMAL,PIN_PN,2);                        ///<NC
+       light_pin_cfg(GPIO2_22,PIN_SPEED_NORMAL,PIN_PN,2);                        ///<WIFI_BT_GPIO2
+       light_pin_cfg(GPIO2_23,PIN_SPEED_NORMAL,PIN_PN,2);                        ///<WIFI_BT_GPIO3
+       light_pin_cfg(GPIO2_24,PIN_SPEED_NORMAL,PIN_PN,2);                        ///<WIFI_BT_RST_N
+       light_pin_cfg(GPIO2_25,PIN_SPEED_NORMAL,PIN_PU,2);                        ///KEY1
+
+       light_pin_mux(SDIO0_WPRTN,3);
+       light_pin_cfg(SDIO0_WPRTN,PIN_SPEED_NORMAL,PIN_PN,2);                    ///< NC
+       light_pin_mux(SDIO1_WPRTN,3);
+       light_pin_cfg(SDIO1_WPRTN,PIN_SPEED_NORMAL,PIN_PU,2);                   ///VBUS_EN
+       light_pin_mux(SDIO1_DETN,3);
+       light_pin_cfg(SDIO1_DETN,PIN_SPEED_NORMAL,PIN_PN,2);                    ///WCN_33_EN
+
+       light_pin_mux(GPIO2_30,0);
+       light_pin_mux(GPIO2_31,0);
+       light_pin_mux(GPIO3_0,0);
+       light_pin_mux(GPIO3_1,0);
+       light_pin_mux(GPIO3_2,1);
+       light_pin_mux(GPIO3_3,0);
+       light_pin_cfg(GPIO2_30, PIN_SPEED_NORMAL, PIN_PN, 0x2);                 ///NC
+       light_pin_cfg(GPIO2_31, PIN_SPEED_NORMAL, PIN_PN, 0x2);                 ///NC
+       light_pin_cfg(GPIO3_0, PIN_SPEED_NORMAL, PIN_PN, 0x2);                  ///NC
+       light_pin_cfg(GPIO3_1, PIN_SPEED_NORMAL, PIN_PN, 0x2);
+       light_pin_cfg(GPIO3_2, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+       light_pin_cfg(GPIO3_3, PIN_SPEED_NORMAL, PIN_PN, 0x2);
+
+       light_pin_mux(GMAC0_COL,3);
+       light_pin_mux(GMAC0_CRS,3);
+       light_pin_cfg(GMAC0_COL,PIN_SPEED_NORMAL,PIN_PU,2);
+       light_pin_cfg(GMAC0_CRS,PIN_SPEED_NORMAL,PIN_PU,2);
+
+       /* GMAC0 pad drive strength configurate to 0xF */
+       light_pin_cfg(GMAC0_TX_CLK, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+       light_pin_cfg(GMAC0_RX_CLK, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+       light_pin_cfg(GMAC0_TXEN, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+       light_pin_cfg(GMAC0_TXD0, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+       light_pin_cfg(GMAC0_TXD1, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+       light_pin_cfg(GMAC0_TXD2, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+       light_pin_cfg(GMAC0_TXD3, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+       light_pin_cfg(GMAC0_RXDV, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+       light_pin_cfg(GMAC0_RXD0, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+       light_pin_cfg(GMAC0_RXD1, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+       light_pin_cfg(GMAC0_RXD2, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+       light_pin_cfg(GMAC0_RXD3, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+}
+
 #else
 static void light_iopin_init(void)
 {

diff --git a/board/thead/light-c910/lpddr-regu/ddr_regu.c b/board/thead/light-c910/lpddr-regu/ddr_regu.c
index 72d1f815b5c757477c1ed240312f8a1ef529c9f8..1f5a8b6a5ec379f27c55668098cc481596a079f9 100644 (file)
--- a/board/thead/light-c910/lpddr-regu/ddr_regu.c
+++ b/board/thead/light-c910/lpddr-regu/ddr_regu.c
@@ -136,7 +136,7 @@ static const struct regulator_t g_apcpu_regu_id_list[] = {
                REGU_ID_DEF(IIC_IDX_AONIIC,APCPU_REGU_VDDM,0x31,0x39,0,1,800000,600000,3500000,12500,1),
        },
 };
-#elif defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_A_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF) || (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE) || defined (CONFIG_TARGET_LIGHT_FM_C910_LPI4A)
+#elif defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_A_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF) || (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE) || defined (CONFIG_TARGET_LIGHT_FM_C910_LPI4A) || defined (CONFIG_TARGET_LIGHT_FM_C910_MILKV_MELES)
 /**
  * board for ant-ref
  *
@@ -955,7 +955,7 @@ int pmic_reset_apcpu_voltage(void)
                return ret;
        return 0;
 }
-#elif defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_A_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF)|| (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE) || defined (CONFIG_TARGET_LIGHT_FM_C910_LPI4A)
+#elif defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_A_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF)|| (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE) || defined (CONFIG_TARGET_LIGHT_FM_C910_LPI4A) || defined (CONFIG_TARGET_LIGHT_FM_C910_MILKV_MELES)
 int pmic_reset_apcpu_voltage(void)
 {
        int                ret = -1;

diff --git a/configs/light_milkv_meles_defconfig b/configs/light_milkv_meles_defconfig
new file mode 100644 (file)
index 0000000..0bcb6e0
--- /dev/null
+++ b/configs/light_milkv_meles_defconfig
@@ -0,0 +1,89 @@
+CONFIG_RISCV=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_ENV_SIZE=0x20000
+CONFIG_ENV_OFFSET=0xe0000
+CONFIG_NR_DRAM_BANKS=8
+CONFIG_SPL=y
+CONFIG_SMP=y
+CONFIG_TARGET_LIGHT_C910=y
+CONFIG_PMIC_VOL_INIT=y
+CONFIG_TARGET_LIGHT_FM_C910_MILKV_MELES=y
+CONFIG_DDR_LP4X_3733_SINGLERANK=y
+CONFIG_DDR_BOARD_CONFIG=y
+CONFIG_ARCH_RV64I=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
+CONFIG_DEFAULT_FDT_FILE="thead/light-milkv-meles.dtb"
+CONFIG_BOARD_LATE_INIT=y
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_DISPLAY_BOARDINFO=y
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
+CONFIG_SYS_PROMPT="Milk-V Meles# "
+CONFIG_CMD_BOOT_SLAVE=y
+CONFIG_CMD_ERASEENV=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_DDR_SCAN=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_EXT4_WRITE=y
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_PARTITION_TYPE_GUID=y
+CONFIG_OF_EMBED=y
+CONFIG_DEFAULT_DEVICE_TREE="light-milkv-meles"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_CLK=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_UDP_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x10000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_DM_GPIO=y
+CONFIG_DWAPB_GPIO=y
+CONFIG_DM_PCA953X=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_DW=y
+# CONFIG_MMC_SPI is not set
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_SNPS=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_SNPS=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_SPI_NAND=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHY_REALTEK=y
+CONFIG_RTL8211E_PINE64_GIGABIT_FIX=y
+CONFIG_RTL8211X_PHY_FORCE_MASTER=y
+CONFIG_RTL8211F_PHY_FORCE_EEE_RXC_ON=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_PHY=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DESIGNWARE_SPI=y
+CONFIG_DESIGNWARE_QSPI=y
+CONFIG_USB=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="U-Boot-THEAD"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1234
+CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
+CONFIG_SYS_WHITE_ON_BLACK=y
+# CONFIG_SPL_USE_TINY_PRINTF is not set
+CONFIG_OF_LIBFDT_OVERLAY=y
+# CONFIG_EFI_LOADER is not set