ice: Adjust scheduler default BW weight
authorTarun Singh <tarun.k.singh@intel.com>
Mon, 13 Jul 2020 20:53:11 +0000 (13:53 -0700)
committerTony Nguyen <anthony.l.nguyen@intel.com>
Wed, 29 Jul 2020 15:38:55 +0000 (08:38 -0700)
By default the queues are configured in legacy mode. The default
BW settings for legacy/advanced modes are different. The existing
code was using the advanced mode default value of 1 which was
incorrect. This caused the unbalanced BW sharing among siblings.
The recommended default value is applied.

Signed-off-by: Tarun Singh <tarun.k.singh@intel.com>
Tested-by: Andrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
drivers/net/ethernet/intel/ice/ice_common.c
drivers/net/ethernet/intel/ice/ice_type.h

index fd95345..35644fe 100644 (file)
@@ -3907,7 +3907,18 @@ ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 q_handle,
         * Without setting the generic section as valid in valid_sections, the
         * Admin queue command will fail with error code ICE_AQ_RC_EINVAL.
         */
-       buf->txqs[0].info.valid_sections = ICE_AQC_ELEM_VALID_GENERIC;
+       buf->txqs[0].info.valid_sections =
+               ICE_AQC_ELEM_VALID_GENERIC | ICE_AQC_ELEM_VALID_CIR |
+               ICE_AQC_ELEM_VALID_EIR;
+       buf->txqs[0].info.generic = 0;
+       buf->txqs[0].info.cir_bw.bw_profile_idx =
+               cpu_to_le16(ICE_SCHED_DFLT_RL_PROF_ID);
+       buf->txqs[0].info.cir_bw.bw_alloc =
+               cpu_to_le16(ICE_SCHED_DFLT_BW_WT);
+       buf->txqs[0].info.eir_bw.bw_profile_idx =
+               cpu_to_le16(ICE_SCHED_DFLT_RL_PROF_ID);
+       buf->txqs[0].info.eir_bw.bw_alloc =
+               cpu_to_le16(ICE_SCHED_DFLT_BW_WT);
 
        /* add the LAN queue */
        status = ice_aq_add_lan_txq(hw, num_qgrps, buf, buf_size, cd);
index e434947..1eb83d9 100644 (file)
@@ -409,7 +409,7 @@ enum ice_rl_type {
 #define ICE_SCHED_DFLT_BW              0xFFFFFFFF      /* unlimited */
 #define ICE_SCHED_DFLT_RL_PROF_ID      0
 #define ICE_SCHED_NO_SHARED_RL_PROF_ID 0xFFFF
-#define ICE_SCHED_DFLT_BW_WT           1
+#define ICE_SCHED_DFLT_BW_WT           4
 #define ICE_SCHED_INVAL_PROF_ID                0xFFFF
 #define ICE_SCHED_DFLT_BURST_SIZE      (15 * 1024)     /* in bytes (15k) */