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drm/radeon/dpm: disable gfx PG on PALM
author
Alex Deucher
<alexander.deucher@amd.com>
Thu, 11 Jul 2013 19:00:14 +0000
(15:00 -0400)
committer
Alex Deucher
<alexander.deucher@amd.com>
Sun, 14 Jul 2013 14:11:24 +0000
(10:11 -0400)
Gfx PG doesn't seem to work properly when UVD is initialized
on certain PALM boards. Disable gfx PG for now until we sort
out a proper fix.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/radeon/sumo_dpm.c
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diff --git
a/drivers/gpu/drm/radeon/sumo_dpm.c
b/drivers/gpu/drm/radeon/sumo_dpm.c
index 11b6b9924f1bc54656ec0d4f85307d658c2d0ffc..ca381028bd7b674bc51cbfa3b1f2ce9002c1c37f 100644
(file)
--- a/
drivers/gpu/drm/radeon/sumo_dpm.c
+++ b/
drivers/gpu/drm/radeon/sumo_dpm.c
@@
-1732,7
+1732,13
@@
int sumo_dpm_init(struct radeon_device *rdev)
pi->enable_sclk_ds = true;
pi->enable_dynamic_m3_arbiter = false;
pi->enable_dynamic_patch_ps = true;
- pi->enable_gfx_power_gating = true;
+ /* Some PALM chips don't seem to properly ungate gfx when UVD is in use;
+ * for now just disable gfx PG.
+ */
+ if (rdev->family == CHIP_PALM)
+ pi->enable_gfx_power_gating = false;
+ else
+ pi->enable_gfx_power_gating = true;
pi->enable_gfx_clock_gating = true;
pi->enable_mg_clock_gating = true;
pi->enable_auto_thermal_throttling = true;