intel/compiler: Update opt_split_sends() for Xe2 reg size

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25020>

diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
index a84df81..0e7960f 100644 (file)
--- a/src/intel/compiler/brw_fs.cpp
+++ b/src/intel/compiler/brw_fs.cpp
@@ -3167,7 +3167,7 @@ fs_visitor::opt_split_sends()
       next_ip++;
 
       if (send->opcode != SHADER_OPCODE_SEND ||
-          send->mlen == 1 || send->ex_mlen > 0)
+          send->mlen <= reg_unit(devinfo) || send->ex_mlen > 0)
          continue;
 
       /* Don't split payloads which are also read later. */