arm64: dts: qcom: sm8350: Set up WRAP2 QUPs

Set up I2C&SPI hosts and UARTs connected to WRAP2 and their respective pins.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211114012755.112226-11-konrad.dybcio@somainline.org

diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index 033d398..944ad86 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -667,6 +667,164 @@
                        #size-cells = <2>;
                        ranges;
                        status = "disabled";
+
+                       i2c14: i2c@880000 {
+                               compatible = "qcom,geni-i2c";
+                               reg = <0 0x00880000 0 0x4000>;
+                               clock-names = "se";
+                               clocks = <&gcc GCC_QUPV3_WRAP2_S0_CLK>;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&qup_i2c14_default>;
+                               interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               status = "disabled";
+                       };
+
+                       spi14: spi@880000 {
+                               compatible = "qcom,geni-spi";
+                               reg = <0 0x00880000 0 0x4000>;
+                               clock-names = "se";
+                               clocks = <&gcc GCC_QUPV3_WRAP2_S0_CLK>;
+                               interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
+                               power-domains = <&rpmhpd SM8350_CX>;
+                               operating-points-v2 = <&qup_opp_table_120mhz>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               status = "disabled";
+                       };
+
+                       i2c15: i2c@884000 {
+                               compatible = "qcom,geni-i2c";
+                               reg = <0 0x00884000 0 0x4000>;
+                               clock-names = "se";
+                               clocks = <&gcc GCC_QUPV3_WRAP2_S1_CLK>;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&qup_i2c15_default>;
+                               interrupts = <GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               status = "disabled";
+                       };
+
+                       spi15: spi@884000 {
+                               compatible = "qcom,geni-spi";
+                               reg = <0 0x00884000 0 0x4000>;
+                               clock-names = "se";
+                               clocks = <&gcc GCC_QUPV3_WRAP2_S1_CLK>;
+                               interrupts = <GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>;
+                               power-domains = <&rpmhpd SM8350_CX>;
+                               operating-points-v2 = <&qup_opp_table_120mhz>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               status = "disabled";
+                       };
+
+                       i2c16: i2c@888000 {
+                               compatible = "qcom,geni-i2c";
+                               reg = <0 0x00888000 0 0x4000>;
+                               clock-names = "se";
+                               clocks = <&gcc GCC_QUPV3_WRAP2_S2_CLK>;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&qup_i2c16_default>;
+                               interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               status = "disabled";
+                       };
+
+                       spi16: spi@888000 {
+                               compatible = "qcom,geni-spi";
+                               reg = <0 0x00888000 0 0x4000>;
+                               clock-names = "se";
+                               clocks = <&gcc GCC_QUPV3_WRAP2_S2_CLK>;
+                               interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>;
+                               power-domains = <&rpmhpd SM8350_CX>;
+                               operating-points-v2 = <&qup_opp_table_100mhz>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               status = "disabled";
+                       };
+
+                       i2c17: i2c@88c000 {
+                               compatible = "qcom,geni-i2c";
+                               reg = <0 0x0088c000 0 0x4000>;
+                               clock-names = "se";
+                               clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&qup_i2c17_default>;
+                               interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               status = "disabled";
+                       };
+
+                       spi17: spi@88c000 {
+                               compatible = "qcom,geni-spi";
+                               reg = <0 0x0088c000 0 0x4000>;
+                               clock-names = "se";
+                               clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>;
+                               interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>;
+                               power-domains = <&rpmhpd SM8350_CX>;
+                               operating-points-v2 = <&qup_opp_table_100mhz>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               status = "disabled";
+                       };
+
+                       /* QUP no. 18 seems to be strictly SPI/UART-only */
+
+                       spi18: spi@890000 {
+                               compatible = "qcom,geni-spi";
+                               reg = <0 0x00890000 0 0x4000>;
+                               clock-names = "se";
+                               clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>;
+                               interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>;
+                               power-domains = <&rpmhpd SM8350_CX>;
+                               operating-points-v2 = <&qup_opp_table_100mhz>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               status = "disabled";
+                       };
+
+                       uart18: serial@890000 {
+                               compatible = "qcom,geni-uart";
+                               reg = <0 0x00890000 0 0x4000>;
+                               clock-names = "se";
+                               clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&qup_uart18_default>;
+                               interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>;
+                               power-domains = <&rpmhpd SM8350_CX>;
+                               operating-points-v2 = <&qup_opp_table_100mhz>;
+                               status = "disabled";
+                       };
+
+                       i2c19: i2c@894000 {
+                               compatible = "qcom,geni-i2c";
+                               reg = <0 0x00894000 0 0x4000>;
+                               clock-names = "se";
+                               clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&qup_i2c19_default>;
+                               interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               status = "disabled";
+                       };
+
+                       spi19: spi@894000 {
+                               compatible = "qcom,geni-spi";
+                               reg = <0 0x00894000 0 0x4000>;
+                               clock-names = "se";
+                               clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>;
+                               interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>;
+                               power-domains = <&rpmhpd SM8350_CX>;
+                               operating-points-v2 = <&qup_opp_table_100mhz>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               status = "disabled";
+                       };
                };
 
                qupv3_id_0: geniqup@9c0000 {
@@ -1417,6 +1575,13 @@
                                bias-disable;
                        };
 
+                       qup_uart18_default: qup-uart18-default {
+                               pins = "gpio58", "gpio59";
+                               function = "qup18";
+                               drive-strength = <2>;
+                               bias-disable;
+                       };
+
                        qup_i2c0_default: qup-i2c0-default {
                                pins = "gpio4", "gpio5";
                                function = "qup0";
@@ -1507,6 +1672,41 @@
                                drive-strength = <2>;
                                bias-pull-up;
                        };
+
+                       qup_i2c14_default: qup-i2c14-default {
+                               pins = "gpio56", "gpio57";
+                               function = "qup14";
+                               drive-strength = <2>;
+                               bias-disable;
+                       };
+
+                       qup_i2c15_default: qup-i2c15-default {
+                               pins = "gpio60", "gpio61";
+                               function = "qup15";
+                               drive-strength = <2>;
+                               bias-disable;
+                       };
+
+                       qup_i2c16_default: qup-i2c16-default {
+                               pins = "gpio64", "gpio65";
+                               function = "qup16";
+                               drive-strength = <2>;
+                               bias-disable;
+                       };
+
+                       qup_i2c17_default: qup-i2c17-default {
+                               pins = "gpio72", "gpio73";
+                               function = "qup17";
+                               drive-strength = <2>;
+                               bias-disable;
+                       };
+
+                       qup_i2c19_default: qup-i2c19-default {
+                               pins = "gpio76", "gpio77";
+                               function = "qup19";
+                               drive-strength = <2>;
+                               bias-disable;
+                       };
                };
 
                rng: rng@10d3000 {