ARM: zynq: add gem support
authorSteffen Trumtrar <s.trumtrar@pengutronix.de>
Wed, 11 Dec 2013 17:29:49 +0000 (09:29 -0800)
committerMichal Simek <michal.simek@xilinx.com>
Thu, 12 Dec 2013 08:48:12 +0000 (09:48 +0100)
The zynq includes a Cadence GEM IP core. This is compatible with the macb driver.
Add it to the zynq-7000 DT.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Josh Cartwright <josh.cartwright@ni.com>
[soren: rebased to current Linus tree, added zc706 + zed support, moved phy-mode property to board level dtses]
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
arch/arm/boot/dts/zynq-7000.dtsi
arch/arm/boot/dts/zynq-zc702.dts
arch/arm/boot/dts/zynq-zc706.dts
arch/arm/boot/dts/zynq-zed.dts

index e7f73b2..aebc48d 100644 (file)
                        interrupts = <0 50 4>;
                };
 
+               gem0: ethernet@e000b000 {
+                       compatible = "cdns,gem";
+                       reg = <0xe000b000 0x4000>;
+                       status = "disabled";
+                       interrupts = <0 22 4>;
+                       clocks = <&clkc 30>, <&clkc 30>, <&clkc 13>;
+                       clock-names = "pclk", "hclk", "tx_clk";
+               };
+
+               gem1: ethernet@e000c000 {
+                       compatible = "cdns,gem";
+                       reg = <0xe000c000 0x4000>;
+                       status = "disabled";
+                       interrupts = <0 45 4>;
+                       clocks = <&clkc 31>, <&clkc 31>, <&clkc 14>;
+                       clock-names = "pclk", "hclk", "tx_clk";
+               };
+
                slcr: slcr@f8000000 {
                        compatible = "xlnx,zynq-slcr";
                        reg = <0xF8000000 0x1000>;
index 21aea99..34d680a 100644 (file)
 
 };
 
+&gem0 {
+       status = "okay";
+       phy-mode = "rgmii";
+};
+
 &uart1 {
        status = "okay";
 };
index 79009e0..b2835d5 100644 (file)
 
 };
 
+&gem0 {
+       status = "okay";
+       phy-mode = "rgmii";
+};
+
 &uart1 {
        status = "okay";
 };
index d6acf2b..2eda068 100644 (file)
 
 };
 
+&gem0 {
+       status = "okay";
+       phy-mode = "rgmii";
+};
+
 &uart1 {
        status = "okay";
 };