arm64: dts: mediatek: mt8195: add MMSYS configuration for VPPSYS
authorRoy-CW.Yeh <roy-cw.yeh@mediatek.com>
Mon, 6 Feb 2023 09:11:05 +0000 (17:11 +0800)
committerMatthias Brugger <matthias.bgg@gmail.com>
Mon, 6 Mar 2023 13:34:35 +0000 (14:34 +0100)
With the change of the MMSYS binding file for MT8195, the compatible
name of VPPSYS in dts need to be fixed to match the definition.

Signed-off-by: Roy-CW.Yeh <roy-cw.yeh@mediatek.com>
Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Tested-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20230206091109.1324-3-moudy.ho@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
arch/arm64/boot/dts/mediatek/mt8195.dtsi

index 8f1264d..5261367 100644 (file)
                        #clock-cells = <1>;
                };
 
-               vppsys0: clock-controller@14000000 {
-                       compatible = "mediatek,mt8195-vppsys0";
+               vppsys0: syscon@14000000 {
+                       compatible = "mediatek,mt8195-vppsys0", "syscon";
                        reg = <0 0x14000000 0 0x1000>;
                        #clock-cells = <1>;
                };
                        power-domains = <&spm MT8195_POWER_DOMAIN_WPESYS>;
                };
 
-               vppsys1: clock-controller@14f00000 {
-                       compatible = "mediatek,mt8195-vppsys1";
+               vppsys1: syscon@14f00000 {
+                       compatible = "mediatek,mt8195-vppsys1", "syscon";
                        reg = <0 0x14f00000 0 0x1000>;
                        #clock-cells = <1>;
                };