arm64: tegra: Update Tegra234 BPMP channel addresses

On final Tegra234 systems, shared memory for communication with BPMP is
located at offset 0x70000 in SYSRAM.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
index 400c01a..844cab4 100644 (file)
--- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
@@ -126,19 +126,19 @@
 
        sram@40000000 {
                compatible = "nvidia,tegra234-sysram", "mmio-sram";
-               reg = <0x0 0x40000000 0x0 0x50000>;
+               reg = <0x0 0x40000000 0x0 0x80000>;
                #address-cells = <1>;
                #size-cells = <1>;
-               ranges = <0x0 0x0 0x40000000 0x50000>;
+               ranges = <0x0 0x0 0x40000000 0x80000>;
 
-               cpu_bpmp_tx: sram@4e000 {
-                       reg = <0x4e000 0x1000>;
+               cpu_bpmp_tx: sram@70000 {
+                       reg = <0x70000 0x1000>;
                        label = "cpu-bpmp-tx";
                        pool;
                };
 
-               cpu_bpmp_rx: sram@4f000 {
-                       reg = <0x4f000 0x1000>;
+               cpu_bpmp_rx: sram@71000 {
+                       reg = <0x71000 0x1000>;
                        label = "cpu-bpmp-rx";
                        pool;
                };