drm/amd/display: Remove interface for periodic interrupt 1

[why]
Only a single VLINE interrupt is available so interface should not
expose the second one which is used by DMU firmware.

[how]
Remove references to periodic_interrupt1 and VLINE1 from DC interfaces.

Reviewed-by: Jaehyun Chung <jaehyun.chung@amd.com>
Acked-by: Jasdeep Dhillon <jdhillon@amd.com>
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 19eb960..f0b90ca 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -2759,11 +2759,8 @@ static void copy_stream_update_to_stream(struct dc *dc,
        if (update->abm_level)
                stream->abm_level = *update->abm_level;
 
-       if (update->periodic_interrupt0)
-               stream->periodic_interrupt0 = *update->periodic_interrupt0;
-
-       if (update->periodic_interrupt1)
-               stream->periodic_interrupt1 = *update->periodic_interrupt1;
+       if (update->periodic_interrupt)
+               stream->periodic_interrupt = *update->periodic_interrupt;
 
        if (update->gamut_remap)
                stream->gamut_remap_matrix = *update->gamut_remap;
@@ -2983,13 +2980,8 @@ static void commit_planes_do_stream_update(struct dc *dc,
 
                if (!pipe_ctx->top_pipe &&  !pipe_ctx->prev_odm_pipe && pipe_ctx->stream == stream) {
 
-                       if (stream_update->periodic_interrupt0 &&
-                                       dc->hwss.setup_periodic_interrupt)
-                               dc->hwss.setup_periodic_interrupt(dc, pipe_ctx, VLINE0);
-
-                       if (stream_update->periodic_interrupt1 &&
-                                       dc->hwss.setup_periodic_interrupt)
-                               dc->hwss.setup_periodic_interrupt(dc, pipe_ctx, VLINE1);
+                       if (stream_update->periodic_interrupt && dc->hwss.setup_periodic_interrupt)
+                               dc->hwss.setup_periodic_interrupt(dc, pipe_ctx);
 
                        if ((stream_update->hdr_static_metadata && !stream->use_dynamic_meta) ||
                                        stream_update->vrr_infopacket ||

diff --git a/drivers/gpu/drm/amd/display/dc/dc_stream.h b/drivers/gpu/drm/amd/display/dc/dc_stream.h
index 9fcf9dc..9e6025c 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc_stream.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_stream.h
@@ -212,8 +212,7 @@ struct dc_stream_state {
        /* DMCU info */
        unsigned int abm_level;
 
-       struct periodic_interrupt_config periodic_interrupt0;
-       struct periodic_interrupt_config periodic_interrupt1;
+       struct periodic_interrupt_config periodic_interrupt;
 
        /* from core_stream struct */
        struct dc_context *ctx;
@@ -281,8 +280,7 @@ struct dc_stream_update {
        struct dc_info_packet *hdr_static_metadata;
        unsigned int *abm_level;
 
-       struct periodic_interrupt_config *periodic_interrupt0;
-       struct periodic_interrupt_config *periodic_interrupt1;
+       struct periodic_interrupt_config *periodic_interrupt;
 
        struct dc_info_packet *vrr_infopacket;
        struct dc_info_packet *vsc_infopacket;

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
index 287fdec..7252174 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -3812,7 +3812,7 @@ void dcn10_calc_vupdate_position(
 {
        const struct dc_crtc_timing *dc_crtc_timing = &pipe_ctx->stream->timing;
        int vline_int_offset_from_vupdate =
-                       pipe_ctx->stream->periodic_interrupt0.lines_offset;
+                       pipe_ctx->stream->periodic_interrupt.lines_offset;
        int vupdate_offset_from_vsync = dc->hwss.get_vupdate_offset_from_vsync(pipe_ctx);
        int start_position;
 
@@ -3837,18 +3837,10 @@ void dcn10_calc_vupdate_position(
 static void dcn10_cal_vline_position(
                struct dc *dc,
                struct pipe_ctx *pipe_ctx,
-               enum vline_select vline,
                uint32_t *start_line,
                uint32_t *end_line)
 {
-       enum vertical_interrupt_ref_point ref_point = INVALID_POINT;
-
-       if (vline == VLINE0)
-               ref_point = pipe_ctx->stream->periodic_interrupt0.ref_point;
-       else if (vline == VLINE1)
-               ref_point = pipe_ctx->stream->periodic_interrupt1.ref_point;
-
-       switch (ref_point) {
+       switch (pipe_ctx->stream->periodic_interrupt.ref_point) {
        case START_V_UPDATE:
                dcn10_calc_vupdate_position(
                                dc,
@@ -3857,7 +3849,9 @@ static void dcn10_cal_vline_position(
                                end_line);
                break;
        case START_V_SYNC:
-               // Suppose to do nothing because vsync is 0;
+               // vsync is line 0 so start_line is just the requested line offset
+               *start_line = pipe_ctx->stream->periodic_interrupt.lines_offset;
+               *end_line = *start_line + 2;
                break;
        default:
                ASSERT(0);
@@ -3867,24 +3861,15 @@ static void dcn10_cal_vline_position(
 
 void dcn10_setup_periodic_interrupt(
                struct dc *dc,
-               struct pipe_ctx *pipe_ctx,
-               enum vline_select vline)
+               struct pipe_ctx *pipe_ctx)
 {
        struct timing_generator *tg = pipe_ctx->stream_res.tg;
+       uint32_t start_line = 0;
+       uint32_t end_line = 0;
 
-       if (vline == VLINE0) {
-               uint32_t start_line = 0;
-               uint32_t end_line = 0;
+       dcn10_cal_vline_position(dc, pipe_ctx, &start_line, &end_line);
 
-               dcn10_cal_vline_position(dc, pipe_ctx, vline, &start_line, &end_line);
-
-               tg->funcs->setup_vertical_interrupt0(tg, start_line, end_line);
-
-       } else if (vline == VLINE1) {
-               pipe_ctx->stream_res.tg->funcs->setup_vertical_interrupt1(
-                               tg,
-                               pipe_ctx->stream->periodic_interrupt1.lines_offset);
-       }
+       tg->funcs->setup_vertical_interrupt0(tg, start_line, end_line);
 }
 
 void dcn10_setup_vupdate_interrupt(struct dc *dc, struct pipe_ctx *pipe_ctx)

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h
index 9ae07c7..0ef7bf7 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h
@@ -175,8 +175,7 @@ void dcn10_set_cursor_attribute(struct pipe_ctx *pipe_ctx);
 void dcn10_set_cursor_sdr_white_level(struct pipe_ctx *pipe_ctx);
 void dcn10_setup_periodic_interrupt(
                struct dc *dc,
-               struct pipe_ctx *pipe_ctx,
-               enum vline_select vline);
+               struct pipe_ctx *pipe_ctx);
 enum dc_status dcn10_set_clock(struct dc *dc,
                enum dc_clock_type clock_type,
                uint32_t clk_khz,

diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h b/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h
index 416b700..d35b061 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h
@@ -32,11 +32,6 @@
 #include "inc/hw/link_encoder.h"
 #include "core_status.h"
 
-enum vline_select {
-       VLINE0,
-       VLINE1
-};
-
 struct pipe_ctx;
 struct dc_state;
 struct dc_stream_status;
@@ -117,8 +112,7 @@ struct hw_sequencer_funcs {
                        int group_index, int group_size,
                        struct pipe_ctx *grouped_pipes[]);
        void (*setup_periodic_interrupt)(struct dc *dc,
-                       struct pipe_ctx *pipe_ctx,
-                       enum vline_select vline);
+                       struct pipe_ctx *pipe_ctx);
        void (*set_drr)(struct pipe_ctx **pipe_ctx, int num_pipes,
                        struct dc_crtc_timing_adjust adjust);
        void (*set_static_screen_control)(struct pipe_ctx **pipe_ctx,