// TODO: relies on the impossibility of a current and a temporary loads
// in the same packet.
TmpDefs.insert(*SRI);
- else if (i <= 1 && HexagonMCInstrInfo::hasNewValue2(MCII, MCI))
- // vshuff(Vx, Vy, Rx) <- Vx(0) and Vy(1) are both source and
- // destination registers with this instruction. same for vdeal(Vx,Vy,Rx)
- Uses.insert(*SRI);
else if (!IgnoreTmpDst)
Defs[*SRI].insert(PredSense(PredReg, isTrue));
}
--- /dev/null
+# RUN: not llvm-mc -arch=hexagon -mv65 -mhvx -filetype=obj -o 1.o %s 2>&1 | FileCheck --implicit-check-not=error %s
+
+{ v1 = v2; vshuff(v1,v3,r0) }
+# CHECK: error: register `V1' modified more than once
+
+{ v4 = v3; vdeal(v6,v4,r0) }
+# CHECK: error: register `V4' modified more than once
--- /dev/null
+# RUN: not llvm-mc -arch=hexagon -mv65 -mhvx -filetype=obj %s 2>&1 | FileCheck %s
+
+{ vshuff(v0,v0,r0) }
+# CHECK: error: register `V0' modified more than once
+
+{ vdeal(v1,v1,r0) }
+# CHECK: error: register `V1' modified more than once
// V6_vdeal
// vdeal(Vy32,Vx32,Rt32)
- vdeal(v0,v0,r0)
-# CHECK-NEXT: 19e0e040 { vdeal(v0,v0,r0) }
+ vdeal(v0,v1,r0)
+# CHECK-NEXT: 19e0e041 { vdeal(v0,v1,r0) }
// V6_vdealb
// Vd32.b=vdeal(Vu32.b)
// V6_vshuff
// vshuff(Vy32,Vx32,Rt32)
- vshuff(v0,v0,r0)
-# CHECK-NEXT: 19e0e020 { vshuff(v0,v0,r0) }
+ vshuff(v0,v1,r0)
+# CHECK-NEXT: 19e0e021 { vshuff(v0,v1,r0) }
// V6_vshuffb
// Vd32.b=vshuff(Vu32.b)