[RISCV] Use canonical move instruction in RISCVAsmPrinter::EmitHwasanMemaccessSymbols.

We were using an OR with X0 which is the canonical move for AArch64.
The canonical move for RISC-V is ADDI reg1, reg2, 0.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D142044

diff --git a/llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp b/llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
index f1af99a..a4b999e 100644 (file)
--- a/llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
+++ b/llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
@@ -449,10 +449,10 @@ void RISCVAsmPrinter::EmitHwasanMemaccessSymbols(Module &M) {
                                                                             8),
         MCSTI);
     if (Reg != RISCV::X10)
-      OutStreamer->emitInstruction(MCInstBuilder(RISCV::OR)
+      OutStreamer->emitInstruction(MCInstBuilder(RISCV::ADDI)
                                        .addReg(RISCV::X10)
-                                       .addReg(RISCV::X0)
-                                       .addReg(Reg),
+                                       .addReg(Reg)
+                                       .addImm(0),
                                    MCSTI);
     OutStreamer->emitInstruction(
         MCInstBuilder(RISCV::ADDI)